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Compiler Reference Guide

Preface Arm Compiler Tools Overview armclang Reference armclang Command-line Options Summary of armclang command-line options -C (armclang) -c (armclang) -D -E -e -fbare-metal-pie -fbracket-depth=N -fcommon, -fno-common -fdata-sections, -fno-data-sections -ffast-math, -fno-fast-math -ffixed-rN -ffp-mode -ffunction-sections, -fno-function-sections -fident, -fno-ident @file -fldm-stm, -fno-ldm-stm -fno-builtin -fno-inline-functions -flto, -fno-lto -fexceptions, -fno-exceptions -fomit-frame-pointer, -fno-omit-frame-pointer -fpic, -fno-pic -fropi, -fno-ropi -fropi-lowering, -fno-ropi-lowering -frwpi, -fno-rwpi -frwpi-lowering, -fno-rwpi-lowering -fsanitize -fshort-enums, -fno-short-enums -fshort-wchar, -fno-short-wchar -fstack-protector, -fstack-protector-all, -fstack- -fstrict-aliasing, -fno-strict-aliasing -fsysv, -fno-sysv -ftrapv -fvectorize, -fno-vectorize -fvisibility -fwrapv -g, -gdwarf-2, -gdwarf-3, -gdwarf-4 (armclang) -I -include -L -l -M, -MM -MD, -MMD -MF -MG -MP -MT -march -marm -masm -mbig-endian -mbranch-protection -mcmodel -mcmse -mcpu -mexecute-only -mfloat-abi -mfpu -mimplicit-it -mlittle-endian -mno-neg-immediates -moutline, -mno-outline -mpixolib -munaligned-access, -mno-unaligned-access -mthumb -nostdlib -nostdlibinc -o (armclang) -O (armclang) -pedantic -pedantic-errors -Rpass -S -save-temps -shared (armclang) -std --target -U -u (armclang) -v (armclang) --version (armclang) --version_number (armclang) --vsn (armclang) -W -Wl -Xlinker -x (armclang) -### Compiler-specific Keywords and Operators Compiler-specific keywords and operators __alignof__ __asm __declspec attributes __declspec(noinline) __declspec(noreturn) __declspec(nothrow) __inline __promise __unaligned Global named register variables Compiler-specific Function, Variable, and Type Att Function attributes __attribute__((always_inline)) function attribute __attribute__((cmse_nonsecure_call)) function attr __attribute__((cmse_nonsecure_entry)) function att __attribute__((const)) function attribute __attribute__((constructor(priority))) function at __attribute__((format_arg(string-index))) function __attribute__((interrupt("type"))) function attrib __attribute__((malloc)) function attribute __attribute__((naked)) function attribute __attribute__((noinline)) function attribute __attribute__((nonnull)) function attribute __attribute__((noreturn)) function attribute __attribute__((nothrow)) function attribute __attribute__((pcs("calling_convention"))) functio __attribute__((pure)) function attribute __attribute__((section("name"))) function attribut __attribute__((unused)) function attribute __attribute__((used)) function attribute __attribute__((value_in_regs)) function attribute __attribute__((visibility("visibility_type"))) fun __attribute__((weak)) function attribute __attribute__((weakref("target"))) function attrib Type attributes __attribute__((aligned)) type attribute __attribute__((packed)) type attribute __attribute__((transparent_union)) type attribute Variable attributes __attribute__((alias)) variable attribute __attribute__((aligned)) variable attribute __attribute__((deprecated)) variable attribute __attribute__((packed)) variable attribute __attribute__((section("name"))) variable attribut __attribute__((unused)) variable attribute __attribute__((used)) variable attribute __attribute__((visibility("visibility_type"))) var __attribute__((weak)) variable attribute __attribute__((weakref("target"))) variable attrib Compiler-specific Intrinsics __breakpoint intrinsic __current_pc intrinsic __current_sp intrinsic __disable_fiq intrinsic __disable_irq intrinsic __enable_fiq intrinsic __enable_irq intrinsic __force_stores intrinsic __memory_changed intrinsic __schedule_barrier intrinsic __semihost intrinsic __vfp_status intrinsic Compiler-specific Pragmas #pragma clang system_header #pragma clang diagnostic #pragma clang section #pragma once #pragma pack(...) #pragma unroll[(n)], #pragma unroll_completely #pragma weak symbol, #pragma weak symbol1 = symbol Other Compiler-specific Features ACLE support Predefined macros Inline functions Half-precision floating-point data types Half-precision floating-point number format Half-precision floating-point intrinsics Library support for _Float16 data type BFloat16 floating-point number format TT instruction intrinsics Non-secure function pointer intrinsics armclang Integrated Assembler Syntax of assembly files for integrated assembler Assembly expressions Alignment directives Data definition directives String definition directives Floating-point data definition directives Section directives Conditional assembly directives Macro directives Symbol binding directives Org directive AArch32 Target selection directives AArch64 Target selection directives Space-filling directives Type directive Integrated assembler support for the CSDB instruct armclang Inline Assembler Inline Assembly File-scope inline assembly Inline assembly statements within a function Assembly string Output and input operands Clobber list volatile Inline assembly constraint strings Constraint modifiers Constraint codes Constraint codes common to AArch32 state and AArch Constraint codes for AArch32 state Constraint codes for AArch64 state Using multiple alternative operand constraints Inline assembly template modifiers Template modifiers common to AArch32 state and AAr Template modifiers for AArch32 state Template modifiers for AArch64 state Forcing inline assembly operands into specific reg Symbol references and branches into and out of inl Duplication of labels in inline assembly statement armlink Reference fromelf Reference armar Reference armasm Legacy Assembler Reference Appendixes

Constraint codes for AArch32 state

B8.4.4 Constraint codes for AArch32 state

The following constraint codes are specific to AArch32 state.

Registers

r

Operand must be an integer or floating-point type.

For targets that do not support Thumb-2 technology, the compiler can use R0-R7.

For all other targets, the compiler can use R0-R12, or R14.

l

Operand must be an integer or floating-point type.

For T32 state, the compiler can use R0-R7.

For A32 state, the compiler can use R0-R12, or R14.

h

Operand must be an integer or floating-point type.

For T32 state, the compiler can use R8-R12, or R14.

Not valid for A32 state.

w

Operand must be a floating-point or vector type, or a 64-bit integer.

The compiler can use S0-S31, D0-D31, or Q0-Q15, depending on the size of the operand type.

t

Operand must be an integer or 32-bit floating-point type.

The compiler can use S0-S31, D0-D15, or Q0-Q7.

Te

Operand must be an integer or 32-bit floating-point type.

The compiler can use an even numbered general purpose register in the range R0-R14.

To

Operand must be an integer or 32-bit floating-point type.

The compiler can use an odd numbered general purpose register in the range R1-R11.

The compiler never selects a register that is not available for register allocation. Similarly, R9 is reserved when compiling with -frwpi, and is not selected. The compiler may also reserve one or two registers to use as a frame pointer and a base pointer. The number of registers available for inline assembly operands therefore may be less than the number implied by the ranges above. This number may also vary with the optimization level.

If you use a 64-bit value as an operand to an inline assembly statement in A32 or 32-bit T32 instructions, and you use the r constraint code, then an even/odd pair of general purpose registers is allocated to hold it. This register allocation is not guaranteed for the l or h constraints.

Using the r constraint code enables the use of instructions like LDREXD/STREXD, which require an even/odd register pair. You can reference the registers holding the most and least significant halves of the value with the Q and R template modifiers. For an example of using template modifiers, see B8.5.2 Template modifiers for AArch32 state.

Constants

The constant constraints accept different ranges depending on the selected instruction set. These ranges correspond to the ranges of immediate operands that are available for the different instruction sets. You can use them with a register constraint (see B8.4.6 Using multiple alternative operand constraints) to write inline assembly that emits optimal code for multiple architectures without having to change the assembly code. The emitted code uses immediate operands when possible.

Constraint code 16-bit T32 instructions 32-bit T32 instructions A32 instructions
I [0, 255] Modified immediate value for 32-bit T32 instructions. Modified immediate value for A32 instructions.
J [-255, -1] [-4095, 4095] [-4095, 4095]
K 8-bit value shifted left any amount. Bitwise inverse of a modified immediate value for a 32-bit T32 instruction. Bitwise inverse of a modified immediate value for an A32 instruction.
L [-7, 7] Arithmetic negation of a modified immediate value for a 32-bit T32 instruction. Arithmetic negation of a modified immediate value for an A32 instruction.
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