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ACLE support

6.1 ACLE support

Arm® Compiler 6 supports the Arm C Language Extensions (ACLE) 2.1 with a few exceptions.

Note:

This topic includes descriptions of [ALPHA] and [BETA] features. See Support level definitions.

Arm Compiler 6 does not support:

  • __ARM_ALIGN_MAX_PWR macro.
  • __ARM_ALIGN_MAX_STACK_PWR macro.
  • __cls intrinsic.
  • __clsl intrinsic.
  • __clsll intrinsic.
  • __saturation_occurred intrinsic.
  • __set_saturation_occurred intrinsic.
  • __ignore_saturation intrinsic.
  • Patchable constants.
  • Floating-point data-processing intrinsics.

Arm Compiler 6 does not model the state of the Q (saturation) flag correctly in all situations.

Additionally, Arm Compiler 6 also provides:

  • Support for the ACLE defined dot product intrinsics in AArch64 and AArch32 states.

  • [BETA] Support for the ACLE defined Armv8.2-A half-precision floating-point scalar and vector intrinsics in AArch64 state.

  • [BETA] Support for the ACLE defined Armv8.2-A half-precision floating-point vector intrinsics in AArch32 state.

  • [ALPHA] Support for the ACLE defined Memory Tagging Extension (MTE) intrinsics in AArch64 state.

For more information on the ACLE v2.1 intrinsics, see the ACLE v2.1.

For updates on the latest ACLE intrinsics, see the Arm C Language Extensions.

For more information on intrinsics that use the Advanced SIMD registers, see the NEON Intrinsics Reference.

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