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Preface Arm Compiler Tools Overview armclang Reference armclang Command-line Options Summary of armclang command-line options -C (armclang) -c (armclang) -D -E -e -fbare-metal-pie -fbracket-depth=N -fcommon, -fno-common -fdata-sections, -fno-data-sections -ffast-math, -fno-fast-math -ffixed-rN -ffp-mode -ffunction-sections, -fno-function-sections -fident, -fno-ident @file -fldm-stm, -fno-ldm-stm -fno-builtin -fno-inline-functions -flto, -fno-lto -fexceptions, -fno-exceptions -fomit-frame-pointer, -fno-omit-frame-pointer -fpic, -fno-pic -fropi, -fno-ropi -fropi-lowering, -fno-ropi-lowering -frwpi, -fno-rwpi -frwpi-lowering, -fno-rwpi-lowering -fsanitize -fshort-enums, -fno-short-enums -fshort-wchar, -fno-short-wchar -fstack-protector, -fstack-protector-all, -fstack- -fstrict-aliasing, -fno-strict-aliasing -fsysv, -fno-sysv -ftrapv -fvectorize, -fno-vectorize -fvisibility -fwrapv -g, -gdwarf-2, -gdwarf-3, -gdwarf-4 (armclang) -I -include -L -l -M, -MM -MD, -MMD -MF -MG -MP -MT -march -marm -masm -mbig-endian -mbranch-protection -mcmodel -mcmse -mcpu -mexecute-only -mfloat-abi -mfpu -mimplicit-it -mlittle-endian -mno-neg-immediates -moutline, -mno-outline -mpixolib -munaligned-access, -mno-unaligned-access -mthumb -nostdlib -nostdlibinc -o (armclang) -O (armclang) -pedantic -pedantic-errors -Rpass -S -save-temps -shared (armclang) -std --target -U -u (armclang) -v (armclang) --version (armclang) --version_number (armclang) --vsn (armclang) -W -Wl -Xlinker -x (armclang) -### Compiler-specific Keywords and Operators Compiler-specific keywords and operators __alignof__ __asm __declspec attributes __declspec(noinline) __declspec(noreturn) __declspec(nothrow) __inline __promise __unaligned Global named register variables Compiler-specific Function, Variable, and Type Att Function attributes __attribute__((always_inline)) function attribute __attribute__((cmse_nonsecure_call)) function attr __attribute__((cmse_nonsecure_entry)) function att __attribute__((const)) function attribute __attribute__((constructor(priority))) function at __attribute__((format_arg(string-index))) function __attribute__((interrupt("type"))) function attrib __attribute__((malloc)) function attribute __attribute__((naked)) function attribute __attribute__((noinline)) function attribute __attribute__((nonnull)) function attribute __attribute__((noreturn)) function attribute __attribute__((nothrow)) function attribute __attribute__((pcs("calling_convention"))) functio __attribute__((pure)) function attribute __attribute__((section("name"))) function attribut __attribute__((target("options"))) function attrib __attribute__((unused)) function attribute __attribute__((used)) function attribute __attribute__((value_in_regs)) function attribute __attribute__((visibility("visibility_type"))) fun __attribute__((weak)) function attribute __attribute__((weakref("target"))) function attrib Type attributes __attribute__((aligned)) type attribute __attribute__((packed)) type attribute __attribute__((transparent_union)) type attribute Variable attributes __attribute__((alias)) variable attribute __attribute__((aligned)) variable attribute __attribute__((deprecated)) variable attribute __attribute__((packed)) variable attribute __attribute__((section("name"))) variable attribut __attribute__((unused)) variable attribute __attribute__((used)) variable attribute __attribute__((visibility("visibility_type"))) var __attribute__((weak)) variable attribute __attribute__((weakref("target"))) variable attrib Compiler-specific Intrinsics __breakpoint intrinsic __current_pc intrinsic __current_sp intrinsic __disable_fiq intrinsic __disable_irq intrinsic __enable_fiq intrinsic __enable_irq intrinsic __force_stores intrinsic __memory_changed intrinsic __schedule_barrier intrinsic __semihost intrinsic __vfp_status intrinsic Compiler-specific Pragmas #pragma clang system_header #pragma clang diagnostic #pragma clang section #pragma once #pragma pack(...) #pragma unroll[(n)], #pragma unroll_completely #pragma weak symbol, #pragma weak symbol1 = symbol Other Compiler-specific Features ACLE support Predefined macros Inline functions Volatile variables Half-precision floating-point data types Half-precision floating-point number format Half-precision floating-point intrinsics Library support for _Float16 data type BFloat16 floating-point number format TT instruction intrinsics Non-secure function pointer intrinsics Supported architecture feature combinations for sp armclang Integrated Assembler Syntax of assembly files for integrated assembler Assembly expressions Alignment directives Data definition directives String definition directives Floating-point data definition directives Section directives Conditional assembly directives Macro directives Symbol binding directives Org directive AArch32 Target selection directives AArch64 Target selection directives Space-filling directives Type directive Integrated assembler support for the CSDB instruct armclang Inline Assembler Inline Assembly File-scope inline assembly Inline assembly statements within a function Assembly string Output and input operands Clobber list volatile Inline assembly constraint strings Constraint modifiers Constraint codes Constraint codes common to AArch32 state and AArch Constraint codes for AArch32 state Constraint codes for AArch64 state Using multiple alternative operand constraints Inline assembly template modifiers Template modifiers common to AArch32 state and AAr Template modifiers for AArch32 state Template modifiers for AArch64 state Forcing inline assembly operands into specific reg Symbol references and branches into and out of inl Duplication of labels in inline assembly statement armlink Reference fromelf Reference armar Reference armasm Legacy Assembler Reference Appendixes

TT instruction intrinsics

B6.10 TT instruction intrinsics

Intrinsics are available to support TT instructions depending on the value of the predefined macro __ARM_FEATURE_CMSE.

TT intrinsics

The following table describes the TT intrinsics that are available when __ARM_FEATURE_CMSE is set to either 1 or 3:

Intrinsic Description
cmse_address_info_t cmse_TT(void *p) Generates a TT instruction.
cmse_address_info_t cmse_TT_fptr(p) Generates a TT instruction. The argument p can be any function pointer type.
cmse_address_info_t cmse_TTT(void *p) Generates a TT instruction with the T flag.
cmse_address_info_t cmse_TTT_fptr(p) Generates a TT instruction with the T flag. The argument p can be any function pointer type.

When __ARM_BIG_ENDIAN is not set, the result of the intrinsics is returned in the following C type:

typedef union {
	struct cmse_address_info {
		unsigned mpu_region:8;
		unsigned :8;
		unsigned mpu_region_valid:1;
		unsigned :1;
		unsigned read_ok:1;
		unsigned readwrite_ok:1;
		unsigned :12;
	} flags;
	unsigned value;
} cmse_address_info_t;

When __ARM_BIG_ENDIAN is set, the bit-fields in the type are reversed such that they have the same bit-offset as little-endian systems following the rules specified by Procedure Call Standard for the Arm® Architecture.

TT intrinsics for Arm®v8‑M Security Extension

The following table describes the TT intrinsics for Armv8‑M Security Extension that are available when __ARM_FEATURE_CMSE is set to 3:

Intrinsic Description
cmse_address_info_t cmse_TTA(void *p) Generates a TT instruction with the A flag.
cmse_address_info_t cmse_TTA_fptr(p) Generates a TT instruction with the A flag. The argument p can be any function pointer type.
cmse_address_info_t cmse_TTAT(void *p) Generates a TT instruction with the T and A flag.
cmse_address_info_t cmse_TTAT_fptr(p) Generates a TT instruction with the T and A flag. The argument p can be any function pointer type.

When __ARM_BIG_ENDIAN is not set, the result of the intrinsics is returned in the following C type:

typedef union {
	struct cmse_address_info {
		unsigned mpu_region:8;
		unsigned sau_region:8;
		unsigned mpu_region_valid:1;
		unsigned sau_region_valid:1;
		unsigned read_ok:1;
		unsigned readwrite_ok:1;
		unsigned nonsecure_read_ok:1;
		unsigned nonsecure_readwrite_ok:1;
		unsigned secure:1;
		unsigned idau_region_valid:1;
		unsigned idau_region:8;
	} flags;
	unsigned value;
} cmse_address_info_t;

When __ARM_BIG_ENDIAN is set, the bit-fields in the type are reversed such that they have the same bit-offset as little-endian systems following the rules specified by Procedure Call Standard for the Arm® Architecture.

In Secure state, the TT instruction returns the Security Attribute Unit (SAU) and Implementation Defined Attribute Unit (IDAU) configuration and recognizes the A flag.

Address range check intrinsic

Checking the result of the TT instruction on an address range is essential for programming in C. It is needed to check permissions on objects larger than a byte. You can use the address range check intrinsic to perform permission checks on C objects.

The syntax of this intrinsic is:

void *cmse_check_address_range(void *p, size_t size, int flags)

The intrinsic checks the address range from p to p + size – 1.

The address range check fails if p + size - 1 < p.

Some SAU, IDAU and MPU configurations block the efficient implementation of an address range check. This intrinsic operates under the assumption that the configuration of the SAU, IDAU, and MPU is constrained as follows:

  • An object is allocated in a single region.
  • A stack is allocated in a single region.

These points imply that a region does not overlap other regions.

The TT instruction returns an SAU, IDAU and MPU region number. When the region numbers of the start and end of the address range match, the complete range is contained in one SAU, IDAU, and MPU region. In this case two TT instructions are executed to check the address range.

Regions are aligned at 32-byte boundaries. If the address range fits in one 32-byte address line, a single TT instruction suffices. This is the case when the following constraint holds:

(p mod 32) + size <= 32

The address range check intrinsic fails if the range crosses any MPU region boundary.

The flags parameter of the address range check consists of a set of values defined by the macros shown in the following table:

Macro Value Description
(No macro) 0 The TT instruction without any flag is used to retrieve the permissions of an address, returned in a cmse_address_info_t structure.
CMSE_MPU_UNPRIV 4 Sets the T flag on the TT instruction used to retrieve the permissions of an address. Retrieves the unprivileged mode access permissions.
CMSE_MPU_READWRITE 1 Checks if the permissions have the readwrite_ok field set.
CMSE_MPU_READ 8 Checks if the permissions have the read_ok field set.

The address range check intrinsic returns p on a successful check, and NULL on a failed check. The check fails if any other value is returned that is not one of those listed in the table, or is not a combination of those listed.

Arm recommends that you use the returned pointer to access the checked memory range. This generates a data dependency between the checked memory and all its subsequent accesses and prevents these accesses from being scheduled before the check.

The following intrinsic is defined when the __ARM_FEATURE_CMSE macro is set to 1:

Intrinsic Description
cmse_check_pointed_object(p, f)

Returns the same value as

cmse_check_address_range(p, sizeof(*p), f)

Arm recommends that the return type of this intrinsic is identical to the type of parameter p.

Address range check intrinsic for Arm®v8‑M Security Extension

The semantics of the intrinsic cmse_check_address_range() are extended to handle the extra flag and fields introduced by the Armv8‑M Security Extension.

The address range check fails if the range crosses any SAU or IDAU region boundary.

If the macro __ARM_FEATURE_CMSE is set to 3, the values accepted by the flags parameter are extended with the values defined in the following table:

Macro Value Description
CMSE_AU_NONSECURE 2 Checks if the permissions have the secure field unset.
CMSE_MPU_NONSECURE 16 Sets the A flag on the TT instruction used to retrieve the permissions of an address.
CMSE_NONSECURE 18 Combination of CMSE_AU_NONSECURE and CMSE_MPU_NONSECURE.
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