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Preface armclang Command-line Options Support level definitions Summary of armclang command-line options -C -c -D -E -e -fbare-metal-pie -fbracket-depth=N -fcommon, -fno-common -fdata-sections, -fno-data-sections -ffast-math, -fno-fast-math -ffixed-rN -ffp-mode -ffunction-sections, -fno-function-sections -fident, -fno-ident @file -fldm-stm, -fno-ldm-stm -fno-builtin -fno-inline-functions -flto, -fno-lto -fexceptions, -fno-exceptions -fomit-frame-pointer, -fno-omit-frame-pointer -fropi, -fno-ropi -fropi-lowering, -fno-ropi-lowering -frwpi, -fno-rwpi -frwpi-lowering, -fno-rwpi-lowering -fshort-enums, -fno-short-enums -fshort-wchar, -fno-short-wchar -fstack-protector, -fstack-protector-all, -fstack- -fstrict-aliasing, -fno-strict-aliasing -ftrapv -fvectorize, -fno-vectorize -fvisibility -fwrapv -g, -gdwarf-2, -gdwarf-3, -gdwarf-4 -I -include -L -l -M, -MM -MD, -MMD -MF -MG -MP -MT -march -marm -masm -mbig-endian -mbranch-protection -mcmse -mcpu -mexecute-only -mfloat-abi -mfpu -mimplicit-it -mlittle-endian -mmemtag-stack, -mno-memtag-stack -mno-neg-immediates -moutline, -mno-outline -mpixolib -munaligned-access, -mno-unaligned-access -mthumb -nostdlib -nostdlibinc -o -O -pedantic -pedantic-errors -Rpass -S -save-temps -std --target -U -u -v --version --version_number --vsn -W -Wl -Xlinker -x -### Compiler-specific Keywords and Operators Compiler-specific Function, Variable, and Type Att Compiler-specific Intrinsics Compiler-specific Pragmas Other Compiler-specific Features Standard C Implementation Definition Standard C++ Implementation Definition armclang Integrated Assembler armclang Inline Assembler

-mfpu

1.56 -mfpu

Specifies the target FPU architecture, that is the floating-point hardware available on the target.

Syntax

To view a list of all the supported FPU architectures, use:

-mfpu=list

Note:

-mfpu=list is rejected when targeting AArch64 state.

Alternatively, to specify a target FPU architecture, use:

-mfpu=name

Where name is one of the following:

none
Prevents the compiler from using hardware-based floating-point functions. If the compiler encounters floating-point types in the source code, it uses software-based floating-point library functions. This is similar to the -mfloat-abi=soft option.
vfpv3
Enable the Arm®v7 VFPv3 floating-point extension. Disable the Advanced SIMD extension.
vfpv3-d16
Enable the Armv7 VFPv3-D16 floating-point extension. Disable the Advanced SIMD extension.
vfpv3-fp16
Enable the Armv7 VFPv3 floating-point extension, including the optional half-precision extensions. Disable the Advanced SIMD extension.
vfpv3-d16-fp16
Enable the Armv7 VFPv3-D16 floating-point extension, including the optional half-precision extensions. Disable the Advanced SIMD extension.
vfpv3xd
Enable the Armv7 VFPv3XD floating-point extension. Disable the Advanced SIMD extension.
vfpv3xd-fp16
Enable the Armv7 VFPv3XD floating-point extension, including the optional half-precision extensions. Disable the Advanced SIMD extension.
neon
Enable the Armv7 VFPv3 floating-point extension and the Advanced SIMD extension.
neon-fp16
Enable the Armv7 VFPv3 floating-point extension, including the optional half-precision extensions, and the Advanced SIMD extension.
vfpv4
Enable the Armv7 VFPv4 floating-point extension. Disable the Advanced SIMD extension.
vfpv4-d16
Enable the Armv7 VFPv4-D16 floating-point extension. Disable the Advanced SIMD extension.
neon-vfpv4
Enable the Armv7 VFPv4 floating-point extension and the Advanced SIMD extension.
fpv4-sp-d16
Enable the Armv7 FPv4-SP-D16 floating-point extension.
fpv5-d16
Enable the Armv7 FPv5-D16 floating-point extension.
fpv5-sp-d16
Enable the Armv7 FPv5-SP-D16 floating-point extension.
fp-armv8
Enable the Armv8 floating-point extension. Disable the cryptographic extension and the Advanced SIMD extension.
neon-fp-armv8
Enable the Armv8 floating-point extension and the Advanced SIMD extensions. Disable the cryptographic extension.
crypto-neon-fp-armv8
Enable the Armv8 floating-point extension, the cryptographic extension, and the Advanced SIMD extension.

The -mfpu option overrides the default FPU option implied by the target architecture.

Note:

  • The -mfpu option is ignored with AArch64 targets, for example aarch64-arm-none-eabi. Use the -mcpu option to override the default FPU for aarch64-arm-none-eabi targets. For example, to prevent the use of floating-point instructions or floating-point registers for the aarch64-arm-none-eabi target use the -mcpu=name+nofp+nosimd option. Subsequent use of floating-point data types in this mode is unsupported.
  • In Armv7, the Advanced SIMD extension was called the Arm NEON™ Advanced SIMD extension.

Note:

There are no software floating-point libraries for targets in AArch64 state. When linking for targets in AArch64 state, armlink uses AArch64 libraries that contain Advanced SIMD and floating-point instructions and registers. The use of the AArch64 libraries applies even if you compile the source with -mcpu=<name>+nofp+nosimd to prevent the compiler from using Advanced SIMD and floating-point instructions and registers. Therefore, there is no guarantee that the linked image for targets in AArch64 state is entirely free of Advanced SIMD and floating-point instructions and registers.

You can prevent the use of Advanced SIMD and floating-point instructions and registers in images that are linked for targets in AArch64 state. Either re-implement the library functions or create your own library that does not use Advanced SIMD and floating-point instructions and registers.

Note:

In AArch32 state, if you specify -mfloat-abi=soft, then specifying the -mfpu option does not have an effect.

Default

The default FPU option depends on the target processor.

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