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Language extension compatibility: intrinsics

4.4 Language extension compatibility: intrinsics

Arm® Compiler 6 provides support for some intrinsics that are supported in Arm Compiler 5.

The following table lists some of the commonly used intrinsics that are supported by Arm Compiler 5 and shows whether Arm Compiler 6 supports them or provides an alternative. If there is no support Arm Compiler 6, you must replace them with suitable inline assembly instructions or calls to the standard library. To use the intrinsic in Arm Compiler 6, you must include the appropriate header file. For more information on the ACLE intrinsics, see the Arm® C Language Extensions.

Note:

  • This is not an exhaustive list of all the intrinsics.
  • The intrinsics provided in <arm_compat.h> are only supported for AArch32.

Table 4-6 Compiler intrinsic support in Arm Compiler 6

Intrinsic in Arm Compiler 5 Function Support in Arm Compiler 6 Header file for Arm Compiler 6
__breakpoint Inserts a BKPT instruction. Yes arm_compat.h
__cdp Inserts a coprocessor instruction. Yes. In Arm Compiler 6, the equivalent intrinsic is __arm_cdp. arm_acle.h
__clrex Inserts a CLREX instruction. No -
__clz Inserts a CLZ instruction or equivalent routine. Yes arm_acle.h
__current_pc Returns the program counter at this point. Yes arm_compat.h
__current_sp Returns the stack pointer at this point. Yes arm_compat.h
__isb Inserts ISB or equivalent. Yes arm_acle.h
__disable_fiq Disables FIQ interrupts (Armv7 architecture only). Returns previous value of FIQ mask. Yes arm_compat.h
__disable_irq Disable IRQ interrupts. Returns previous value of IRQ mask. Yes arm_compat.h
__dmb Inserts a DMB instruction or equivalent. Yes arm_acle.h
__dsb Inserts a DSB instruction or equivalent. Yes arm_acle.h
__enable_fiq Enables fast interrupts. Yes arm_compat.h
__enable_irq Enables IRQ interrupts. Yes arm_compat.h
__fabs Inserts a VABS or equivalent code sequence. No. Arm recommends using the standard C library function fabs(). -
__fabsf Single precision version of __fabs. No. Arm recommends using the standard C library function fabsf(). -
__force_stores Flushes all external variables visible from this function, if they have been changed. Yes arm_compat.h
__ldrex Inserts an appropriately sized Load Exclusive instruction. No. This intrinsic is deprecated in ACLE 2.0. -
__ldrexd Inserts an LDREXD instruction. No. This intrinsic is deprecated in ACLE 2.0. -
__ldrt Inserts an appropriately sized user-mode load instruction. No -
__memory_changed Is similar to __force_stores, but also reloads the values from memory. Yes arm_compat.h
__nop Inserts a NOP or equivalent instruction that will not be optimized away. It also inserts a sequence point, and scheduling barrier for side-effecting function calls. Yes arm_acle.h
__pld Inserts a PLD instruction, if supported. Yes arm_acle.h
__pldw Inserts a PLDW instruction, if supported (Armv7 architecture with MP). No. Arm recommends using __pldx described in the ACLE document. arm_acle.h
__pli Inserts a PLI instruction, if supported. Yes arm_acle.h
__promise Compiler assertion that the expression always has a nonzero value. If asserts are enabled then the promise is checked at runtime by evaluating expr using assert(expr).

Yes. However, you must #include <assert.h> to use __promise. __promise has the same behavior as assert() unless at least one of NDEBUG or __DO_NOT_LINK_PROMISE_WITH_ASSERT is defined.

assert.h
__qadd Inserts a saturating add instruction, if supported. Yes arm_acle.h
__qdbl Inserts instructions equivalent to qadd(val,val), if supported. Yes arm_acle.h
__qsub Inserts a saturating subtract, or equivalent routine, if supported. Yes arm_acle.h
__rbit Inserts a bit reverse instruction. Yes arm_acle.h
__rev Insert a REV, or endian swap instruction. Yes arm_acle.h
__return_address Returns value of LR when returning from current function, without inhibiting optimizations like inlining or tailcalling. No. Arm recommends using inline assembly instructions. -
__ror Insert an ROR instruction. Yes arm_acle.h
__schedule_barrier Create a sequence point without effecting memory or inserting NOP instructions. Functions with side effects cannot move past the new sequence point. Yes arm_compat.h
__semihost Inserts an SVC or BKPT instruction. Yes arm_compat.h
__sev Insert a SEV instruction. Error if the SEV instruction is not supported. Yes arm_acle.h
__sqrt Inserts a VSQRT instruction on targets with a VFP coprocessor. No -
__sqrtf single precision version of __sqrt. No -
__ssat Inserts an SSAT instruction. Error if the SSAT instruction is not supported. Yes arm_acle.h
__strex Inserts an appropriately sized Store Exclusive instruction. No. This intrinsic is deprecated in ACLE 2.0. -
__strexd Inserts a doubleword Store Exclusive instruction. No. This intrinsic is deprecated in ACLE 2.0. -
__strt Insert an appropriately sized STRT instruction. No -
__swp Inserts an appropriately sized SWP instruction.

Yes. However, the SWP instruction is deprecated, and Arm does not recommend the use of __swp.

arm_acle.h
__usat Inserts a USAT instruction. Error if the USAT instruction is not supported. Yes arm_acle.h
__wfe Inserts a WFE instruction. Error if the WFE instruction is not supported. Yes arm_acle.h
__wfi Inserts a WFI instruction. Error if the WFI instruction is not supported. Yes arm_acle.h
__yield Inserts a YIELD instruction. Error if the YIELD instruction is not supported. Yes arm_acle.h
ARMv6 SIMD intrinsics Inserts an Armv6 SIMD instruction. No -
ETSI intrinsics 35 intrinsic functions and 2 global variable flags specified in ETSI G729 used for speech encoding. These are provided in the Arm headers in dspfns.h. No -
C55x intrinsics Emulation of selected TI C55x compiler intrinsics. No -
__vfp_status Reads the FPSCR. Yes arm_compat.h
FMA intrinsics Intrinsics for fused-multiply-add on the Cortex®-M4 or Cortex‑A5 processor in c99 mode. No -
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