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Summary of changes between Arm Compiler 6.11 and Arm Compiler 6.12

6.2 Summary of changes between Arm® Compiler 6.11 and Arm® Compiler 6.12

A summary of the changes between Arm® Compiler 6.11 and Arm Compiler 6.12.

Note:

This topic includes descriptions of [ALPHA] features. See Support level definitions.

New architectures and optional extensions

Arm Compiler 6.12 adds:

  • armclang inline assembler and integrated assembler support for the Speculation Barrier (SB) instruction in the AArch32 and AArch64 states. This is mandatory for the Armv8.5-A and later architectures. This is optional for the Armv8‑A to Armv8.4-A architectures. To enable the use of the SB instruction, use -march=armv8-a+sb. For more information, see -march.
  • armclang inline assembler and integrated assembler support for the Speculative Store Bypass Safe (SSBS) register and instructions in the AArch64 state. This is mandatory for the Armv8.5-A and later architectures. This is optional for the Armv8‑A to Armv8.4-A architectures. To enable the use of the SSBS register and instructions, use -march=armv8-a+ssbs. For more information, see -march.
  • armclang inline assembler and integrated assembler support for the Prediction Restriction by Context registers and instructions in the AArch64 state. This is mandatory for the Armv8.5-A and later architectures. This is optional for the Armv8‑A to Armv8.4-A architectures. To enable the Prediction Restriction by Context registers and instructions, use -march=armv8-a+predres. For more information, see -march.

Command-line options

Arm Compiler 6.12 adds support for the following command-line options.

Keywords

Arm Compiler 6.12 adds support for the register keyword. The register keyword enables the use of certain core registers as global named register variables in the AArch32 state.

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