This intrinsic inserts an SMLADX instruction
into the instruction stream generated by the compiler. It enables
you to exchange the halfwords of the second operand, perform two
signed 16-bit multiplications, adding both results to a 32-bit accumulate
operand. The Q bit is set if the addition overflows. Overflow cannot
occur during the multiplications.
unsigned int __smladx(unsigned int val1, unsigned int val2, unsigned int val3)
where:
val1
holds the first halfword operands for each multiplication
val2
holds the second halfword operands for each multiplication
val3
holds the accumulate value.
The __smladx intrinsic returns the product
of each multiplication added to the accumulate value, as a 32-bit
integer.
Example:
unsigned int dual_multiply_accumulate(unsigned int val1, unsigned int val2, unsigned int val3)
{
unsigned int res;
res = __smladx(val1,val2,val3); /* p1 = val1[15:0] × val2[31:16]
p2 = val1[31:16] × val2[15:0]
res[31:0] = p1 + p2 + val3[31:0]
*/
return res;
}
This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies.
ARM websites use two types of cookie: (1) those that enable the site to function and perform as required; and (2) analytical cookies which anonymously track visitors only while using the site. If you are not happy with this use of these cookies please review our Privacy Policy to learn how they can be disabled. By disabling cookies some features of the site will not work.