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RealView Compiler User's Guide

Instruction generation

4.8.1. Instruction generation

When compiling code for ARMv6, the compiler:

  • Generates explicit sign-extend and zero-extend instructions where appropriate.

  • Performs code scheduling for ARM11 cores.

  • Generates the endian reversal instructions REV, REV16 and REVSH if it can deduce that a C expression performs an endian reversal.

  • Might make use of some architecture v6 specific implementations of C library functions, for example, memcpy.

The compiler cannot generate SIMD instructions, because these do not map well onto C expressions.

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