|
|||
| Products Download Events Support Videos | |||
Technical Support
On-Line Manuals
Compiler User Guide
Conventions and Feedback
Overview of the Compiler
Getting Started with the Compiler
Compiler Features
Compiler intrinsics
Performance benefits of compiler intrinsics
ARM assembler instruction intrinsics supported by
Generic intrinsics supported by the compiler
Compiler intrinsics for controlling IRQ and FIQ in
Compiler intrinsics for inserting optimization bar
Compiler intrinsics for inserting native instructi
Compiler intrinsics for Digital Signal Processing
European Telecommunications Standards Institute (E
Compiler support for European Telecommunications S
Overflow and carry status flags for C and C++ code
Texas Instruments (TI) C55x intrinsics for optimiz
Compiler support for accessing registers using nam
Pragmas recognized by the compiler
Compiler and processor support for bit-banding
Compiler type attribute, __attribute__((bitband))
--bitband compiler command-line option
How the compiler handles bit-band objects placed o
Compiler support for thread-local storage
Compiler eight-byte alignment features
Using compiler and linker support for symbol versi
PreCompiled Header (PCH) files
Automatic PreCompiled Header (PCH) file processing
PreCompiled Header (PCH) file processing and the h
PreCompiled Header (PCH) file creation requirement
Compilation with multiple PreCompiled Header (PCH)
Obsolete PreCompiled Header (PCH) files
Manually specifying the filename and location of a
Selectively applying PreCompiled Header (PCH) file
Suppressing PreCompiled Header (PCH) file processi
Message output during PreCompiled Header (PCH) pro
Performance issues with PreCompiled Header (PCH) f
Default compiler options that are affected by opti
Compiler Coding Practices
Compiler Diagnostic Messages
Using the Inline and Embedded Assemblers of the AR
Compiler User Guide
Compiler intrinsics for controlling IRQ and FIQ interrupts
| |||
| Home > Compiler Features > Compiler intrinsics for controlling IRQ and FIQ interrupts | |||
The intrinsics __disable_irq, __enable_irq, __disable_fiq and __enable_fiq control
IRQ and FIQ interrupts.
You cannot use these intrinsics to change any other CPSR bits,
including the mode, state, and imprecise data abort setting. This
means that the intrinsics can be used only if the processor is already
in a privileged mode, because the control bits of the CPSR and SPSR cannot
be changed in User mode.
These intrinsics are available for all processor architectures in both ARM and Thumb state, as follows:
If you are compiling for processors that support ARMv6 (or later), a
CPSinstruction is generated inline for these functions, for example:CPSID iIf you are compiling for processors that support ARMv4 or ARMv5 in ARM state, the compiler inlines a sequence of
MRSandMSRinstructions, for example:MRS r0, CPSR ORR r0, r0, #0x80 MSR CPSR_c, r0If you are compiling for processors that support ARMv4 or ARMv5 in Thumb state, or if
--compatibleis being used, the compiler calls a helper function, for example:BL __ARM_disable_irq
See also- Reference
| Copyright © 2007-2008, 2011-2012 ARM. All rights reserved. | ARM DUI 0375D |
| Non-Confidential | ID062912 |
 PDF version | |
| Home > Compiler Features > Compiler intrinsics for controlling IRQ and FIQ interrupts |
ProductsDevelopment Tools |
Hardware & Collateral |
Downloads |
Support |
Buy |
|
 |
|||
