Typically, this intrinsic disables FIQ interrupts by setting the F-bit in the CPSR.
However, for v7-M it sets the fault mask register (FAULTMASK). FIQ interrupts are not
supported in v6-M.
Syntax
int __disable_fiq(void)
void __disable_fiq(void)
Usage
int __disable_fiq(void);
disables fast interrupts and returns the value the FIQ interrupt mask has in the
PSR before disabling interrupts.
void __disable_fiq(void);
disables fast interrupts.
Return value
int
__disable_fiq(void);
returns the value the FIQ interrupt mask has in the PSR before disabling FIQ interrupts.
Restrictions
int __disable_fiq(void); is not supported when compiling with
--cpu=7. This is because of the difference between the
generic ARMv7 architecture and the ARMv7 R and M-profiles in the exception handling model.
This means that when you compile with --cpu=7, the compiler
is unable to generate an instruction sequence that works on all ARMv7 processors and
therefore int
__disable_fiq(void); is not supported. You can use the void __disable_fiq(void); function prototype
with --cpu=7.
The __disable_fiq intrinsic can only be executed in privileged modes, that
is, in non-user modes. In User mode this intrinsic does not change the interrupt flags in
the CPSR.
Example
void foo(void)
{
int was_masked = __disable_fiq();
/* ... */
if (!was_masked)
__enable_fiq();
}
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