 RealView Compiler User's Guide | |
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RealView Compiler User's Guide
Preface Introduction Getting started with the ARM Compiler Compiler Features Coding Practices Diagnostic Messages Using the Inline and Embedded Assemblers Semihosting About semihosting
What is semihosting? The semihosting interface Semihosting implementation RealView ARMulator ISS RealView ICE Instruction Set System Model RealMonitor Semihosting operations angel_SWIreason_EnterSVC (0x17) angel_SWIreason_ReportException (0x18) SYS_CLOSE (0x02) SYS_CLOCK (0x10) SYS_ELAPSED (0x30) SYS_ERRNO (0x13) SYS_FLEN (0x0C) SYS_GET_CMDLINE (0x15) SYS_HEAPINFO (0x16) SYS_ISERROR (0x08) SYS_ISTTY (0x09) SYS_OPEN (0x01) SYS_READ (0x06) SYS_READC (0x07) SYS_REMOVE (0x0E) SYS_RENAME (0x0F) SYS_SEEK (0x0A) SYS_SYSTEM (0x12) SYS_TICKFREQ (0x31) SYS_TIME (0x11) SYS_TMPNAM (0x0D) SYS_WRITE (0x05) SYS_WRITEC (0x03) SYS_WRITE0 (0x04) Debug agent interaction SVCsRealView ARMulator ISS
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When a semihosting request is encountered, RVISS traps the SVC directly and the instruction in the SVC entry in the vector table is not executed.
To turn the support for semihosting off in RVISS, change Default_Semihost in the default.ami file to No_Semihost.
See the RealView ARMulator ISS User Guide for more information.
| Copyright © 2007 ARM Limited. All rights reserved. | ARM DUI 0375A |
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