BFC{cond} Rd, #lsb, #width

BFI{cond} Rd, Rn, #lsb, #width

where:

width bits in Rd are cleared, starting at lsb. Other bits in Rd are unchanged.

width bits in Rd, starting at lsb, are replaced by width bits from Rn, starting at bit[0]. Other bits in Rd are unchanged.

You cannot use PC for any register.

You can use SP in ARM instructions but these are deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.

These instructions do not change the flags.

These ARM instructions are available in ARMv6T2 and above.

These 32-bit Thumb instructions are available in ARMv6T2 and above.

There are no 16-bit Thumb versions of these instructions.