PLtype{cond} [Rn {, #offset}]

PLtype{cond} [Rn, +/-Rm {, shift}]

PLtype{cond} label

where:

The offset is applied to the value in Rn before the preload takes place. The result is used as the memory address for the preload. The range of offsets permitted is:

The assembler calculates the offset from the PC for you. The assembler generates an error if label is out of range.

In ARM code, the value in Rm is added to or subtracted from the value in Rn. In 32-bit Thumb code, the value in Rm can only be added to the value in Rn. The result used as the memory address for the preload.

The range of shifts permitted is:

No alignment checking is performed for preload instructions.

Rm must not be PC. For Thumb instructions Rm must also not be SP.

Rn must not be PC for Thumb instructions of the syntax PLtype{cond} [Rn, +/-Rm{, #shift}].

ARM PLD is available in ARMv5TE and above.

32-bit Thumb PLD is available in ARMv6T2 and above.

PLDW is available only in ARMv7 and above that implement the Multiprocessing Extensions.

PLI is available only in ARMv7 and above.

There are no 16-bit Thumb PLD, PLDW, or PLI instructions.

These are hint instructions, and their implementation is optional. If they are not implemented, they execute as NOPs.