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SRS
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TBB and TBH
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VFP Programming
Directives Reference
QADD, QSUB, QDADD, and QDSUB
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| Home > ARM and Thumb Instructions > QADD, QSUB, QDADD, and QDSUB | |||
Signed Add, Subtract, Double and Add, Double and Subtract,
saturating the result to the signed range -231 ≤ x ≤
231-1.
Syntax{opcond} {Rd},Rm,Rn
where:
opis one of
QADD,QSUB,QDADD, orQDSUB.condis an optional condition code.
Rdis the destination register.
Rm, Rnare the registers holding the operands.
The QADD instruction adds the values in RmRn
The QSUB instruction subtracts the value in RnRm
The QDADD instruction calculates SAT(. Saturation can
occur on the doubling operation, on the addition, or on both. If
saturation occurs on the doubling but not on the addition, the Q
flag is set but the final result is unsaturated.Rm +
SAT(Rn * 2))
The QDSUB instruction calculates SAT(. Saturation can
occur on the doubling operation, on the subtraction, or on both.
If saturation occurs on the doubling but not on the subtraction,
the Q flag is set but the final result is unsaturated.Rm -
SAT(Rn * 2))
Note
All values are treated as two’s complement signed integers by these instructions.
You cannot use PC for any operand.
You can use SP in ARM instructions but these are deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.
If saturation occurs, these instructions set the Q flag. To
read the state of the Q flag, use an MRS instruction.
These ARM instructions are available in ARMv6 and above, and E variants of ARMv5T.
These 32-bit Thumb instructions are available in ARMv6T2 and above. For the ARMv7-M architecture, they are only available in an ARMv7E-M implementation.
There are no 16-bit Thumb versions of these instructions.
| Copyright © 2011-2012 ARM. All rights reserved. | ARM DUI 0588B |
| Non-Confidential | ID062912 |
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| Home > ARM and Thumb Instructions > QADD, QSUB, QDADD, and QDSUB |
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