op{L}{cond} coproc, CRd, [Rn]
op{L}{cond} coproc, CRd, [Rn, #{-}offset] ; offset addressing
op{L}{cond} coproc, CRd, [Rn, #{-}offset]! ; pre-index addressing
op{L}{cond} coproc, CRd, [Rn], #{-}offset ; post-index addressing
op{L}{cond} coproc, CRd, label
where:
opis one of LDC, LDC2, STC,
or STC2.
condis an optional condition code.
In ARM code, cond is
not permitted for LDC2 or STC2.
Lis
an optional suffix specifying a long transfer.
coprocis the name of the coprocessor the instruction is
for. The standard name is pn, where n is
an integer in the range 0 to 15.
CRdis the coprocessor register to load or store.
Rnis the register on which the memory address is based.
If PC is specified, the value used is the address of the current
instruction plus eight.
-is
an optional minus sign. If - is present,
the offset is subtracted from Rn. Otherwise,
the offset is added to Rn.
offsetis an expression evaluating to a multiple of 4,
in the range 0 to 1020.
!is
an optional suffix. If ! is present, the address including the offset
is written back into Rn.
labelis a word-aligned PC-relative expression.
label must
be within 1020 bytes of the current instruction.