Assembler Reference

LDR and STR, unprivileged

ARM Compiler toolchain v5.02 for µVision Assembler Reference

Home > ARM and Thumb Instructions > LDR and STR, unprivileged

LDR and STR, unprivileged

Unprivileged load and Store, byte, halfword, or word.

When these instructions are executed by privileged software, they access memory with the same restrictions as they would have if they were executed by unprivileged software.

When executed by unprivileged software these instructions behave in exactly the same way as the corresponding load or store instruction, for example LDRSBT behaves in the same way as LDRSB.

Syntax

op{type}T{cond} Rt, [Rn {, #offset}]       ; immediate offset (32-bit Thumb only)

op{type}T{cond} Rt, [Rn] {, #offset}       ; post-indexed (ARM only)

op{type}T{cond} Rt, [Rn], +/-Rm {, shift}  ; post-indexed (register) (ARM only)

where:

op

can be either:

LDR: Load Register
STR: Store Register.

type

can be any one of:

B: unsigned Byte (Zero extend to 32 bits on loads.)
SB: signed Byte (LDR only. Sign extend to 32 bits.)
H: unsigned Halfword (Zero extend to 32 bits on loads.)
SH: signed Halfword (LDR only. Sign extend to 32 bits.)
-: omitted, for Word.

cond

is an optional condition code.

Rt

is the register to load or store.

Rn

is the register on which the memory address is based.

offset

is an offset. If offset is omitted, the address is the value in Rn.

Rm

is a register containing a value to be used as the offset. Rm must not be PC.

shift

is an optional shift.

Offset ranges and architectures

Table 11 shows the ranges of offsets and availability of these instructions.

Table 11. Offsets and architectures, LDR/STR (User mode)

Instruction	Immediate offset	Post-indexed	+/-`Rm` ^[a]	shift	Arch.^[b]
ARM, word or byte	Not available	-4095 to 4095	+/-`Rm`	`LSL #0-31`	All
				`LSR #1-32`
				`ASR #1-32`
				`ROR #1-31`
				`RRX`
ARM, signed byte, halfword, or signed halfword	Not available	-255 to 255	+/-`Rm`	Not available	T2
32-bit Thumb, word, halfword, signed halfword, byte, or signed byte	0 to 255	Not available	Not available		T2
^[a]You can use -Rm, +Rm, or Rm. ^[b]Entries in the Architecture column indicate that the instructions are available as follows: All All versions of the ARM architecture. T2 The ARMv6T2 and above architectures.

Assembler Reference

LDR and STR, unprivileged

LDR and STR, unprivileged

Syntax

Offset ranges and architectures

See also

Products

Development Tools

Hardware & Collateral

Downloads

Support

Buy

Important information