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SMLAD and SMLSD
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| Home > ARM and Thumb Instructions > SMLAD and SMLSD | |||
Dual 16-bit Signed Multiply with Addition or Subtraction of products and 32-bit accumulation.
Syntax{X}{opcond}Rd,Rn,Rm,Ra
where:
opis one of:
SMLADDual multiply, accumulate sum of products.
SMLSDDual multiply, accumulate difference of products.
condis an optional condition code.
Xis an optional parameter. If
Xis present, the most and least significant halfwords of the second operand are exchanged before the multiplications occur.Rdis the destination register.
Rn, Rmare the registers holding the operands.
Rais the register holding the accumulate operand.
SMLAD multiplies the bottom halfword of RnRmRnRmRaRd
SMLSD multiplies the bottom halfword of RnRmRnRmRaRd
You cannot use PC for any register.
You can use SP in ARM instructions but these are deprecated in ARMv6T2 and above. You cannot use SP in Thumb instructions.
These ARM instructions are available in ARMv6 and above.
These 32-bit Thumb instructions are available in ARMv6T2 and above. For the ARMv7-M architecture, they are only available in an ARMv7E-M implementation.
There are no 16-bit Thumb versions of these instructions.
- Reference
| Copyright © 2011-2012 ARM. All rights reserved. | ARM DUI 0588B |
| Non-Confidential | ID062912 |
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