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Assembler User Guide
Preface
Overview of the Assembler
Overview of the ARM Architecture
Structure of Assembly Language Modules
Writing ARM Assembly Language
Condition Codes
Using the Assembler
Symbols, Literals, Expressions, and Operators
VFP Programming
Assembler Command-line Options
ARM and Thumb Instructions
ARM and Thumb instruction summary
Instruction width specifiers
Flexible second operand (Operand2)
Syntax of Operand2 as a constant
Syntax of Operand2 as a register with optional shi
Shift operations
Saturating instructions
Condition code suffixes
ADC
ADD
ADR (PC-relative)
ADR (register-relative)
ADRL pseudo-instruction
AND
ASR
B
BFC
BFI
BIC
BKPT
BL
BLX
BX
BXJ
CBZ and CBNZ
CDP and CDP2
CLREX
CLZ
CMP and CMN
CPS
CPY pseudo-instruction
DBG
DMB
DSB
EOR
ERET
HVC
ISB
IT
LDC and LDC2
LDM
LDR (immediate offset)
LDR (PC-relative)
LDR (register offset)
LDR (register-relative)
LDR pseudo-instruction
LDR, unprivileged
LDREX
LSL
LSR
MCR and MCR2
MCRR and MCRR2
MLA
MLS
MOV
MOV32 pseudo-instruction
MOVT
MRC and MRC2
MRRC and MRRC2
MRS (PSR to general-purpose register)
MRS (system coprocessor register to ARM register)
MSR (ARM register to system coprocessor register)
MSR (general-purpose register to PSR)
MUL
MVN
NEG pseudo-instruction
NOP
ORN (Thumb only)
ORR
PKHBT and PKHTB
PLD and PLI
POP
PUSH
QADD
QADD8
QADD16
QASX
QDADD
QDSUB
QSAX
QSUB
QSUB8
QSUB16
RBIT
REV
REV16
REVSH
RFE
ROR
RRX
RSB
RSC
SADD8
SADD16
SASX
SBC
SBFX
SDIV
SEL
SETEND
SEV
SHADD8
SHADD16
SHASX
SHSAX
SHSUB8
SHSUB16
SMC
SMLAxy
SMLAD
SMLAL
SMLALD
SMLALxy
SMLAWy
SMLSD
SMLSLD
SMMLA
SMMLS
SMMUL
SMUAD
SMULxy
SMULL
SMULWy
SMUSD
SRS
SSAT
SSAT16
SSAX
SSUB8
SSUB16
STC and STC2
STM
STR (immediate offset)
STR (register offset)
STR, unprivileged
STREX
SUB
SUBS pc, lr
SVC
SWP and SWPB
SXTAB
SXTAB16
SXTAH
SXTB
SXTB16
SXTH
SYS
TBB and TBH
TEQ
TST
UADD8
UADD16
UASX
UBFX
UDIV
UHADD8
UHADD16
UHASX
UHSAX
UHSUB8
UHSUB16
UMAAL
UMLAL
UMULL
UND pseudo-instruction
UQADD8
UQADD16
UQASX
UQSAX
UQSUB8
UQSUB16
USAD8
USADA8
USAT
USAT16
USAX
USUB8
USUB16
UXTAB
UXTAB16
UXTAH
UXTB
UXTB16
UXTH
WFE
WFI
YIELD
VFP Instructions
Directives Reference
Via File Syntax
WFI
| Non-Confidential |  PDF version | ARM DUI0379H | ||
| ||||
| Home > ARM and Thumb Instructions > WFI | ||||
10.186 WFI
Wait for Interrupt.
Syntax
WFI{condwhere:
cond- is an optional condition code.
Operation
This is a hint instruction. It is optional whether this instruction
is implemented or not. If this instruction is not implemented, it
executes as a
NOP. The assembler produces
a diagnostic message if the instruction executes as a NOP on
the target.WFI executes as a NOP instruction in ARMv6T2.WFI suspends execution until one
of the following events occurs:- An IRQ interrupt, regardless of the CPSR I-bit.
- An FIQ interrupt, regardless of the CPSR F-bit.
- An Imprecise Data abort, unless masked by the CPSR A-bit.
- A Debug Entry request, regardless of whether Debug is enabled.
Architectures
This ARM instruction is available in ARMv6K and above.
This 32-bit Thumb instruction is available in ARMv6T2 and
above.
This 16-bit Thumb instruction is available in ARMv6T2 and
above.
| Non-Confidential | PDF version | ARM DUI0379H |
| Copyright © 2007, 2008, 2011, 2012, 2014-2016 ARM. All rights reserved. |
| Home > ARM and Thumb Instructions > WFI |
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