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Assembler User Guide

Preface Overview of the Assembler Overview of the ARM Architecture Structure of Assembly Language Modules Writing ARM Assembly Language Condition Codes Using the Assembler Symbols, Literals, Expressions, and Operators VFP Programming Assembler Command-line Options ARM and Thumb Instructions ARM and Thumb instruction summary Instruction width specifiers Flexible second operand (Operand2) Syntax of Operand2 as a constant Syntax of Operand2 as a register with optional shi Shift operations Saturating instructions Condition code suffixes ADC ADD ADR (PC-relative) ADR (register-relative) ADRL pseudo-instruction AND ASR B BFC BFI BIC BKPT BL BLX BX BXJ CBZ and CBNZ CDP and CDP2 CLREX CLZ CMP and CMN CPS CPY pseudo-instruction DBG DMB DSB EOR ERET HVC ISB IT LDC and LDC2 LDM LDR (immediate offset) LDR (PC-relative) LDR (register offset) LDR (register-relative) LDR pseudo-instruction LDR, unprivileged LDREX LSL LSR MCR and MCR2 MCRR and MCRR2 MLA MLS MOV MOV32 pseudo-instruction MOVT MRC and MRC2 MRRC and MRRC2 MRS (PSR to general-purpose register) MRS (system coprocessor register to ARM register) MSR (ARM register to system coprocessor register) MSR (general-purpose register to PSR) MUL MVN NEG pseudo-instruction NOP ORN (Thumb only) ORR PKHBT and PKHTB PLD and PLI POP PUSH QADD QADD8 QADD16 QASX QDADD QDSUB QSAX QSUB QSUB8 QSUB16 RBIT REV REV16 REVSH RFE ROR RRX RSB RSC SADD8 SADD16 SASX SBC SBFX SDIV SEL SETEND SEV SHADD8 SHADD16 SHASX SHSAX SHSUB8 SHSUB16 SMC SMLAxy SMLAD SMLAL SMLALD SMLALxy SMLAWy SMLSD SMLSLD SMMLA SMMLS SMMUL SMUAD SMULxy SMULL SMULWy SMUSD SRS SSAT SSAT16 SSAX SSUB8 SSUB16 STC and STC2 STM STR (immediate offset) STR (register offset) STR, unprivileged STREX SUB SUBS pc, lr SVC SWP and SWPB SXTAB SXTAB16 SXTAH SXTB SXTB16 SXTH SYS TBB and TBH TEQ TST UADD8 UADD16 UASX UBFX UDIV UHADD8 UHADD16 UHASX UHSAX UHSUB8 UHSUB16 UMAAL UMLAL UMULL UND pseudo-instruction UQADD8 UQADD16 UQASX UQSAX UQSUB8 UQSUB16 USAD8 USADA8 USAT USAT16 USAX USUB8 USUB16 UXTAB UXTAB16 UXTAH UXTB UXTB16 UXTH WFE WFI YIELD VFP Instructions Directives Reference Via File Syntax

IT

10.39 IT

If-Then.

Syntax

IT{x{y{z}}} {cond}
where:
x
specifies the condition switch for the second instruction in the IT block.
y
specifies the condition switch for the third instruction in the IT block.
z
specifies the condition switch for the fourth instruction in the IT block.
cond
specifies the condition for the first instruction in the IT block.
The condition switch for the second, third and fourth instruction in the IT block can be either:
T
Then. Applies the condition cond to the instruction.
E
Else. Applies the inverse condition of cond to the instruction.

Usage

The IT instruction makes up to four following instructions (the IT block) conditional. The conditions can be all the same, or some of them can be the logical inverse of the others.
The instructions (including branches) in the IT block, except the BKPT instruction, must specify the condition in the {cond} part of their syntax.
You are not required to write IT instructions in your code, because the assembler generates them for you automatically according to the conditions specified on the following instructions. However, if you do write IT instructions, the assembler validates the conditions specified in the IT instructions against the conditions specified in the following instructions.
Writing the IT instructions ensures that you consider the placing of conditional instructions, and the choice of conditions, in the design of your code.
When assembling to ARM code, the assembler performs the same checks, but does not generate any IT instructions.
With the exception of CMP, CMN, and TST, the 16-bit instructions that normally affect the condition flags, do not affect them when used inside an IT block.
A BKPT instruction in an IT block is always executed, so it does not require a condition in the {cond} part of its syntax. The IT block continues from the next instruction.

Note

You can use an IT block for unconditional instructions by using the AL condition.
Conditional branches inside an IT block have a longer branch range than those outside the IT block.

Restrictions

The following instructions are not permitted in an IT block:
  • IT.
  • CBZ and CBNZ.
  • TBB and TBH.
  • CPS, CPSID and CPSIE.
  • SETEND.
Other restrictions when using an IT block are:
  • A branch or any instruction that modifies the PC is only permitted in an IT block if it is the last instruction in the block.
  • You cannot branch to any instruction in an IT block, unless when returning from an exception handler.
  • You cannot use any assembler directives in an IT block.

Note

The assembler shows a diagnostic message when any of these instructions are used in an IT block.

Condition flags

This instruction does not change the flags.

Exceptions

Exceptions can occur between an IT instruction and the corresponding IT block, or within an IT block. This exception results in entry to the appropriate exception handler, with suitable return information in LR and SPSR.
Instructions designed for use as exception returns can be used as normal to return from the exception, and execution of the IT block resumes correctly. This is the only way that a PC-modifying instruction can branch to an instruction in an IT block.

Architectures

This 16-bit Thumb instruction is available in ARMv6T2 and above.
In ARM code, IT is a pseudo-instruction that does not generate any code.
There is no 32-bit version of this instruction.

Correct examples

    ITTE   NE        ; IT can be omitted
    ANDNE  r0,r0,r1  ; 16-bit AND, not ANDS
    ADDSNE r2,r2,#1  ; 32-bit ADDS (16-bit ADDS does not set flags in 
                     ; IT block)
    MOVEQ  r2,r3     ; 16-bit MOV
    ITT    AL        ; emit 2 non-flag setting 16-bit instructions
    ADDAL  r0,r0,r1  ; 16-bit ADD, not ADDS
    SUBAL  r2,r2,#1  ; 16-bit SUB, not SUB
    ADD    r0,r0,r1  ; expands into 32-bit ADD, and is not in IT block
    ITT    EQ        
    MOVEQ  r0,r1
    BEQ    dloop     ; branch at end of IT block is permitted
    ITT    EQ
    MOVEQ  r0,r1
    BKPT   #1        ; BKPT always executes
    ADDEQ  r0,r0,#1     

Incorrect example

    IT     NE
    ADD    r0,r0,r1  ; syntax error: no condition code used in IT block
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