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Assembler User Guide

Preface Overview of the Assembler Overview of the ARM Architecture Structure of Assembly Language Modules Writing ARM Assembly Language Condition Codes Using the Assembler Symbols, Literals, Expressions, and Operators VFP Programming Assembler Command-line Options ARM and Thumb Instructions ARM and Thumb instruction summary Instruction width specifiers Flexible second operand (Operand2) Syntax of Operand2 as a constant Syntax of Operand2 as a register with optional shi Shift operations Saturating instructions Condition code suffixes ADC ADD ADR (PC-relative) ADR (register-relative) ADRL pseudo-instruction AND ASR B BFC BFI BIC BKPT BL BLX BX BXJ CBZ and CBNZ CDP and CDP2 CLREX CLZ CMP and CMN CPS CPY pseudo-instruction DBG DMB DSB EOR ERET HVC ISB IT LDC and LDC2 LDM LDR (immediate offset) LDR (PC-relative) LDR (register offset) LDR (register-relative) LDR pseudo-instruction LDR, unprivileged LDREX LSL LSR MCR and MCR2 MCRR and MCRR2 MLA MLS MOV MOV32 pseudo-instruction MOVT MRC and MRC2 MRRC and MRRC2 MRS (PSR to general-purpose register) MRS (system coprocessor register to ARM register) MSR (ARM register to system coprocessor register) MSR (general-purpose register to PSR) MUL MVN NEG pseudo-instruction NOP ORN (Thumb only) ORR PKHBT and PKHTB PLD and PLI POP PUSH QADD QADD8 QADD16 QASX QDADD QDSUB QSAX QSUB QSUB8 QSUB16 RBIT REV REV16 REVSH RFE ROR RRX RSB RSC SADD8 SADD16 SASX SBC SBFX SDIV SEL SETEND SEV SHADD8 SHADD16 SHASX SHSAX SHSUB8 SHSUB16 SMC SMLAxy SMLAD SMLAL SMLALD SMLALxy SMLAWy SMLSD SMLSLD SMMLA SMMLS SMMUL SMUAD SMULxy SMULL SMULWy SMUSD SRS SSAT SSAT16 SSAX SSUB8 SSUB16 STC and STC2 STM STR (immediate offset) STR (register offset) STR, unprivileged STREX SUB SUBS pc, lr SVC SWP and SWPB SXTAB SXTAB16 SXTAH SXTB SXTB16 SXTH SYS TBB and TBH TEQ TST UADD8 UADD16 UASX UBFX UDIV UHADD8 UHADD16 UHASX UHSAX UHSUB8 UHSUB16 UMAAL UMLAL UMULL UND pseudo-instruction UQADD8 UQADD16 UQASX UQSAX UQSUB8 UQSUB16 USAD8 USADA8 USAT USAT16 USAX USUB8 USUB16 UXTAB UXTAB16 UXTAH UXTB UXTB16 UXTH WFE WFI YIELD VFP Instructions Directives Reference Via File Syntax

Shift operations

10.6 Shift operations

Register shift operations move the bits in a register left or right by a specified number of bits, called the shift length.

Register shift can be performed:
  • Directly by the instructions ASR, LSR, LSL, ROR, and RRX, and the result is written to a destination register.
  • During the calculation of Operand2 by the instructions that specify the second operand as a register with shift. The result is used by the instruction.
The permitted shift lengths depend on the shift type and the instruction, see the individual instruction description or the flexible second operand description. If the shift length is 0, no shift occurs. Register shift operations update the carry flag except when the specified shift length is 0.

Arithmetic shift right (ASR)

Arithmetic shift right by n bits moves the left-hand 32-n bits of a register to the right by n places, into the right-hand 32-n bits of the result. It copies the original bit[31] of the register into the left-hand n bits of the result.
You can use the ASR #n operation to divide the value in the register Rm by 2n, with the result being rounded towards negative-infinity.
When the instruction is ASRS or when ASR #n is used in Operand2 with the instructions MOVS, MVNS, ANDS, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to the last bit shifted out, bit[n-1], of the register Rm.

Note

  • If n is 32 or more, then all the bits in the result are set to the value of bit[31] of Rm.
  • If n is 32 or more and the carry flag is updated, it is updated to the value of bit[31] of Rm.
Figure 10-1 ASR #3
ASR #3

Logical shift right (LSR)

Logical shift right by n bits moves the left-hand 32-n bits of a register to the right by n places, into the right-hand 32-n bits of the result. It sets the left-hand n bits of the result to 0.
You can use the LSR #n operation to divide the value in the register Rm by 2n, if the value is regarded as an unsigned integer.
When the instruction is LSRS or when LSR #n is used in Operand2 with the instructions MOVS, MVNS, ANDS, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to the last bit shifted out, bit[n-1], of the register Rm.

Note

  • If n is 32 or more, then all the bits in the result are cleared to 0.
  • If n is 33 or more and the carry flag is updated, it is updated to 0.
Figure 10-2 LSR #3
LSR #3

Logical shift left (LSL)

Logical shift left by n bits moves the right-hand 32-n bits of a register to the left by n places, into the left-hand 32-n bits of the result. It sets the right-hand n bits of the result to 0.
You can use the LSL #n operation to multiply the value in the register Rm by 2n, if the value is regarded as an unsigned integer or a two’s complement signed integer. Overflow can occur without warning.
When the instruction is LSLS or when LSL #n, with non-zero n, is used in Operand2 with the instructions MOVS, MVNS, ANDS, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to the last bit shifted out, bit[32-n], of the register Rm. These instructions do not affect the carry flag when used with LSL #0.

Note

  • If n is 32 or more, then all the bits in the result are cleared to 0.
  • If n is 33 or more and the carry flag is updated, it is updated to 0.
Figure 10-3 LSL #3
LSL #3

Rotate right (ROR)

Rotate right by n bits moves the left-hand 32-n bits of a register to the right by n places, into the right-hand 32-n bits of the result. It also moves the right-hand n bits of the register into the left-hand n bits of the result.
When the instruction is RORS or when ROR #n is used in Operand2 with the instructions MOVS, MVNS, ANDS, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to the last bit rotation, bit[n-1], of the register Rm.

Note

  • If n is 32, then the value of the result is same as the value in Rm, and if the carry flag is updated, it is updated to bit[31] of Rm.
  • ROR with shift length, n, more than 32 is the same as ROR with shift length n-32.
Figure 10-4 ROR #3
ROR #3

Rotate right with extend (RRX)

Rotate right with extend moves the bits of a register to the right by one bit. It copies the carry flag into bit[31] of the result.
When the instruction is RRXS or when RRX is used in Operand2 with the instructions MOVS, MVNS, ANDS, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to bit[0] of the register Rm.
Figure 10-5 RRX
RRX

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