Assembler User GuidePreface Overview of the Assembler Overview of the ARM Architecture Structure of Assembly Language Modules Writing ARM Assembly Language Condition Codes Using the Assembler armasm command-line syntax Specify command-line options with an environment v Using stdin to input source code to the assembler Built-in variables and constants Identifying versions of armasm in source code Diagnostic messages Interlocks diagnostics Automatic IT block generation Thumb branch target alignment Thumb code size diagnostics ARM and Thumb instruction portability diagnostics Instruction width diagnostics Two pass assembler diagnostics Conditional assembly Using the C preprocessor Address alignment Instruction width selection in Thumb Symbols, Literals, Expressions, and Operators VFP Programming Assembler Command-line Options ARM and Thumb Instructions VFP Instructions Directives Reference Via File Syntax
6.16 Address alignment
The handling of unaligned addresses in load and store instructions depends on the ARM architecture version.
In ARMv7-R, the A bit in the System Control Register, SCTLR, controls whether alignment checking is enabled or disabled. In ARMv7-M, the
If alignment checking is enabled, all unaligned word and halfword transfers cause an alignment exception. If disabled, unaligned accesses are permitted for the
ARMv5 and earlier
For word transfers, you must ensure that addresses are 4-byte aligned. Otherwise, if alignment checking is enabled, an alignment exception occurs. If alignment checking is unavailable, or if it is available but disabled, the following occur:
Addresses must be halfword-aligned for halfword transfers, and doubleword-aligned for doubleword transfers.
ARMv6 can be configured to support either the ARMv5 or ARMv7 alignment models, depending on the value of the U bit in the SCTLR. ARMv6-M faults all unaligned data accesses.
If all your data accesses are aligned, you can use the
of your data.