Assembler User GuidePreface Overview of the Assembler Overview of the ARM Architecture About the ARM architecture ARM, Thumb, and ThumbEE instruction sets Changing between ARM, Thumb, and ThumbEE state Processor modes, and privileged and unprivileged s Processor modes in ARMv6-M and ARMv7-M VFP hardware ARM registers General-purpose registers Register accesses Predeclared core register names Predeclared extension register names Predeclared coprocessor names Program Counter Application Program Status Register The Q flag Current Program Status Register Saved Program Status Registers ARM and Thumb instruction set overview Access to the inline barrel shifter Structure of Assembly Language Modules Writing ARM Assembly Language Condition Codes Using the Assembler Symbols, Literals, Expressions, and Operators VFP Programming Assembler Command-line Options ARM and Thumb Instructions VFP Instructions Directives Reference Via File Syntax
2.7 ARM registers
ARM processors provide general-purpose and special-purpose registers. Some additional registers are available in privileged execution modes.
In all ARM processors, the following registers are available and accessible in any processor mode:
NoteThe Link Register can also be used as a general-purpose register. The Stack Pointer can be used as a general-purpose register in ARM state only.
Additional registers are available in privileged software execution.
ARM processors, with the exception of ARMv6-M and ARMv7-M based processors, have a total of 37 registers, with 3 additional registers if the Security Extensions are implemented, and in ARMv7-A only, 3 more if the Virtualization Extensions are implemented. The registers are arranged in partially overlapping banks. There is a different register bank for each processor mode. The banked registers give rapid context switching for dealing with processor exceptions and privileged operations.
The additional registers that are available in privileged software execution, with the exception of ARMv6-M and ARMv7-M, are:
NoteIn privileged software execution, CPSR is an alias for APSR and gives access to additional bits.
The following figure shows how the registers are banked in the ARM architecture except ARMv6-M and ARMv7-M:
Figure 2-1 Organization of general-purpose registers and Program Status Registers
In ARMv6-M and ARMv7-M based processors, SP is an alias for the two banked stack pointer registers:
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