|
|||
| Products Download Events Support Videos | |||
Technical Support
On-Line Manuals
Assembler User Guide
Conventions and feedback
Overview of the Assembler
Overview of the ARM Architecture
Structure of Assembly Language Modules
Writing ARM Assembly Language
Condition Codes
Using the Assembler
Symbols, Literals, Expressions, and Operators
VFP Programming
Architecture support for VFP
Half-precision extension
Fused Multiply-Add extension
Extension register bank mapping
VFP views of the extension register bank
Load values to VFP registers
Conditional execution of VFP instructions
Floating-point exceptions
VFP data types
Extended notation
VFP system registers
FPSCR, the floating-point status and control regis
FPEXC, the floating-point exception register
FPSID, the floating-point system ID register
Flush-to-zero mode
When to use flush-to-zero mode
The effects of using flush-to-zero mode
Operations not affected by flush-to-zero mode
VFP vector mode
Vectors in the VFP extension register bank
VFP vector wrap-around
VFP vector stride
Restriction on vector length
Control of scalar, vector, and mixed operations
VFP directives and vector notation
Pre-UAL VFP mnemonics
Vector notation
VFPASSERT SCALAR
VFPASSERT VECTOR
Assembler User Guide
VFP system registers
| |||
| Home > VFP Programming > VFP system registers | |||
Three VFP system registers are accessible in all implementations of VFP:
FPSCR, the floating-point status and control register
FPEXC, the floating-point exception register
FPSID, the floating-point system ID register.
A particular implementation of VFP can have additional registers.
See also- Concepts
- Reference
Technical Reference Manual for your VFP Coprocessor.
| Copyright © 2007-2008, 2011-2012 ARM. All rights reserved. | ARM DUI 0379D |
| Non-Confidential | ID062912 |
 PDF version | |
| Home > VFP Programming > VFP system registers |
ProductsDevelopment Tools |
Hardware & Collateral |
Downloads |
Support |
Contact |
|
 |
|||
