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Preface Introduction Writing ARM Assembly Language
Introduction Overview of the ARM architecture Architecture versions ARM, Thumb, Thumb‑2, and Thumb‑2EE instruction ARM, Thumb, and ThumbEE state Processor mode Registers Instruction set overview Instruction capabilities Structure of assembly language modules Layout of assembly language source files An example ARM assembly language module Calling subroutines Conditional execution The ALU status flags Conditional execution Using conditional execution Example of the use of conditional execution The Q flag Loading constants into registers Direct loading with MOV and MVN Loading with MOV32 Loading with LDR Rd, =const Loading addresses into registers Direct loading with ADR and ADRL Loading addresses with LDR Rd, =label Load and store multiple register instructions Load and store multiple instructions available in Implementing stacks with LDM and STM Block copy with LDM and STM Using macros Test‑and‑branch macro example Unsigned integer division macro example Using frame directives Assembly language changes Assembler Reference ARM and Thumb Instructions Directives ReferenceInstruction set overview
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All ARM instructions are 32 bits long. Instructions are stored word‑aligned, so the least significant two bits of instruction addresses are always zero in ARM state.
Thumb, Thumb‑2, and Thumb‑2EE instructions are either 16 or 32 bits long. Instructions are stored halfword aligned. Some instructions use the least significant bit to determine whether the code being branched to is Thumb code or ARM code.
Before the introduction of Thumb‑2, the Thumb instruction set was limited to a restricted subset of the functionality of the ARM instruction set. Almost all Thumb instructions were 16‑bit. The Thumb‑2 instruction set functionality is almost identical to that of the ARM instruction set.
See Chapter 4 ARM and Thumb Instructions for detailed information on the syntax of ARM and Thumb instructions.
ARM and Thumb instructions can be classified into a number of functional groups:
These instructions are used to:
branch backwards to form loops
branch forward in conditional structures
branch to subroutines
change the processor between ARM state and Thumb state.
These instructions operate on the general‑purpose registers. They can perform operations such as addition, subtraction, or bitwise logic on the contents of two registers and place the result in a third register. They can also operate on the value in a single register, or on a value in a register and a constant supplied within the instruction (an immediate value).
Long multiply instructions give a 64‑bit result in two registers.
These instructions load or store the value of a single register from or to memory. They can load or store a 32‑bit word, a 16‑bit halfword, or an 8‑bit unsigned byte. Byte and halfword loads can either be sign extended or zero extended to fill the 32‑bit register.
A few instructions are also defined that can load or store 64‑bit doubleword values into two 32‑bit registers.
These instructions load or store any subset of the general‑purpose registers from or to memory. See Load and store multiple register instructions for a detailed description of these instructions.
These instructions move the contents of a status register to or from a general‑purpose register.
| Copyright © 2007 ARM Limited. All rights reserved. | ARM DUI 0379A |
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