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Preface Introduction Writing ARM Assembly Language
Introduction Overview of the ARM architecture Architecture versions ARM, Thumb, Thumb‑2, and Thumb‑2EE instruction ARM, Thumb, and ThumbEE state Processor mode Registers Instruction set overview Instruction capabilities Structure of assembly language modules Layout of assembly language source files An example ARM assembly language module Calling subroutines Conditional execution The ALU status flags Conditional execution Using conditional execution Example of the use of conditional execution The Q flag Loading constants into registers Direct loading with MOV and MVN Loading with MOV32 Loading with LDR Rd, =const Loading addresses into registers Direct loading with ADR and ADRL Loading addresses with LDR Rd, =label Load and store multiple register instructions Load and store multiple instructions available in Implementing stacks with LDM and STM Block copy with LDM and STM Using macros Test‑and‑branch macro example Unsigned integer division macro example Using frame directives Assembly language changes Assembler Reference ARM and Thumb Instructions Directives ReferenceImplementing stacks with LDM and STM
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| Home > Writing ARM Assembly Language > Load and store multiple register instructions > Implementing stacks with LDM and STM | |||
The load and store multiple instructions can update the base register. For stack operations, the base register is usually the stack pointer, r13. This means that you can use these instructions to implement push and pop operations for any number of registers in a single instruction.
The load and store multiple instructions can be used with several types of stack:
- Descending or ascending
The stack grows downwards, starting with a high address and progressing to a lower one (a descending stack), or upwards, starting from a low address and progressing to a higher address (an ascending stack).
- Full or empty
The stack pointer can either point to the last item in the stack (a full stack), or the next free space on the stack (an empty stack).
To make it easier for the programmer, stack‑oriented suffixes can be used instead of the increment or decrement, and before or after suffixes. See Table 2.9 for a list of stack‑oriented suffixes.
Table 2.9. Suffixes for load and store multiple instructions
| Stack type | Push | Pop |
|---|---|---|
| Full descending | STMFD (STMDB, Decrement Before) | LDMFD (LDM, increment after) |
| Full ascending | STMFA (STMIB, Increment Before) | LDMFA (LDMDA, Decrement After) |
| Empty descending | STMED (STMDA, Decrement After) | LDMED (LDMIB, Increment Before) |
| Empty ascending | STMEA (STM, increment after) | LDMEA (LDMDB, Decrement Before) |
For example:
STMFD r13!, {r0‑r5} ; Push onto a Full Descending Stack
LDMFD r13!, {r0‑r5} ; Pop from a Full Descending Stack
Note
The Procedure Call Standard for the ARM Architecture (AAPCS), and ARM and Thumb C and C++ compilers always use a full descending stack.
The PUSH and POP instructions assume a full descending stack. They are the preferred synonyms for STMDB and LDM with writeback.
Stack operations are very useful at subroutine entry and exit. At the start of a subroutine, any working registers required can be stored on the stack, and at exit they can be popped off again.
In addition, if the link register is pushed onto the stack at entry, additional subroutine calls can be made safely without causing the return address to be lost. If you do this, you can also return from a subroutine by popping pc off the stack at exit, instead of popping lr and then moving that value into pc. For example:
subroutine PUSH {r5‑r7,lr} ; Push work registers and lr
; code
BL somewhere_else
; code
POP {r5‑r7,pc} ; Pop work registers and pc
Note
Use this with care in mixed ARM and Thumb systems. In ARMv4T systems, you cannot change state by popping directly into pc. In these cases you must pop the address into a temporary register and use the BX instruction.
In ARMv5T and above, you can change state in this way.
| Copyright © 2007 ARM Limited. All rights reserved. | ARM DUI 0379A |
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