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A. Instruction Set

The A166 Assembler accepts all assembly-language instruction mnemonics as defined in the SIEMENS specifications—this is the basic instruction set, described in the next subsection. Several software instructions are defined and described in a later subsection that allows the assembler to decide automatically which basic instruction is used.

Basic Instruction Set

The following tables show the basic instruction set. For more details, consult the Microcontroller Handbook for the C16x/ST10.

Arithmetic Instructions
Byte/word add ADDB ADDW
Byte/word add with carry ADDC BADDC
Byte/word subtract SUBB SUBW
Byte/word subtract with carry SUBCB SUBCW
Word multiply signed/unsigned (16x16) MUL MULU
Word divide signed/unsigned (16/16) DIV DIVU
32/16 bit signed/unsigned divide DIVL DIVLU
Byte/word 1's complement CPLB CPLW
Byte/word 2's complement NEGB NEGW

 

Bit-Manipulation Instructions
Bit-field manipulation BFLDH BFLDL
Single-bit set BSET
Single-bit clear BCLR
Single-bit move BMOV
Single-bit move of negated bit BMOVN
Single-bit AND BAND
Single-bit XOR BXOR
Single-bit OR BOR
Bit compare BCMP

 

Comparison and Looping Instructions
Word compare with post-increment by 1 or 2 CMPI1 CMPI2
Word compare with post decrement by 1 or 2 CMPD1 CMPD2

 

Shift and Rotate Instructions
Word right shift SHR  
Word left shift SHL  
Word rotate right ROR  
Word rotate left ROL  
Arithmetic shift right (signed shift) ASHR  

 

Move Instructions
Byte/word data move MOVB MOVW
Byte load and zero extend to word MOVBZ
Byte load and sign extend to word MOVBS

 

System-Stack Instructions
Push word onto system stack PUSH  
Pop word from system stack POP  
Save word and load new content SCXT  

 

Logical Instructions
Byte/word bitwise AND ANDB ANDW
Byte/word bitwise XOR XORB XORW
Byte/word bitwise OR ORB ORW

 

Jump and Call Instructions
Conditional jump to relative target JMPR  
Conditional jump to near target JMPA JMPI
Unconditional jump any target (far) JMPS  
Jump on bit condition JBJNB  
Jump on bit and clear/set bit JBC JNBS
Absolute/indirect near call CALLA CALLI
Call near relative target CALLR  
Call far target CALLS  
Push register and call near target PCALL  
Activate interrupt handler TRAP  

 

Return Instructions
Return from near procedure RET  
Return from far procedure RETS  
Return from interrupt procedure RETI  
Pop register and return from procedure RETP  

 

System-Control Instructions
Software reset of the CPU SRST  
Service watchdog timer SRVSDT  
Disable watchdog timer DISWDT  
Enter idle mode IDLE  
Enter power down mode PWRDN  
Signal end of initialization EINIT  

 

Miscellaneous Instructions
Determine the number of shifts required to normalize a word PRIOR  
No operation (two-byte instruction) NOP  
Begin extended page sequence (167) EXTP  
Begin extended segment sequence (167) EXTS  
Begin extended register sequence (167) EXTR  

Software Instruction Set

The software instruction set knows all the hardware instruction requirements, plus some additional ones for easier programming. With software instructions, the assembler can determine which instruction to use based on the operand combinations and types. The following table shows the software instructions and the possible hardware instruction to which each software instruction can be translated:

Software Mnemonic Hardware Mnemonic Operation Type
ADD ADDW, ADDB Word, byte
ADDC ADDCW,ADDCB Word, byte
CPL CPLW, CPLB Word, byte
NEG NEGW, NEGB Word, byte
SUB SUBW, SUBB Word, byte
SUBC SUBCW, SUBCB Word, byte
AND ANDW, ANDB, BAND Word, byte, bit
CMP CMPW, CMPB, BCMP Word, byte, bit
MOV MOVW, MOVB, BMOV Word, byte, bit
OR ORW, ORB, BOR Word, byte, bit
XOR XORW, XORB, BXOR Word, byte, bit
CALL CALLA Absolute
  CALLI Indirect
  CALLR Relative
  CALLS Segmented (far) call
JMP JMPA Absolute
  JMPI Indirect
  JMPR Relative
  JMPS Segmented (far jmp)
RET RET Near return
  RETI Interrupt return
  RETS Segmented (far) return
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