The NONSEGMENTED directive specifies that the assembler
translate the source file using the non-segmented CPU mode. In this
mode, the DPP registers are loaded once and never changed.
Additionally, the total amount of memory that may be addressed is 64K
Bytes total for code and data.
Note
In this mode ASSUME statements and DPP prefixes are not
required.
This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies.
ARM websites use two types of cookie: (1) those that enable the site to function and perform as required; and (2) analytical cookies which anonymously track visitors only while using the site. If you are not happy with this use of these cookies please review our Privacy Policy to learn how they can be disabled. By disabling cookies some features of the site will not work.