C51: VARIABLE BANKING CONFIGURATION OPTIONS

Information in this article applies to:

• C51 Version 7

QUESTION

I have configured code and variable banking and everything is working fine. However, it appears that variable banking modifies all I/O Port bits during bank switching in the functions ?C?CSTXPTR and ?C?CLDXPTR. Is this correct or are there other configuration options?

ANSWER

Basically there are two ways to define the far memory banking routines:

The first way is with the XBANKING.A51 file. This configuration file allows you to modify the variable banking routines. Variable banking is completely independent of the program code banking. It is your task to exclude port pins that should be not modified by modifing the macro LOAD_BANK.

The second way is with the L51_BANK.A51 file. This configuration file allows you to configure program code banking using several different options. When you set ?B_VAR_BANKING EQU 1, L51_BANK.A51 manages the variable banking of your application via the same extension pins used for program code banking.

When you configure ?B_MODE EQU 0, L51_BANK.A51 just modifies the SFR I/O port pins required to address the number of banks that you have defined.

For ?B_MODE EQU 1, all 8-bits of memory mapped XDATA I/O Port are modified.

?B_MODE EQU 4 allows you to define individual macros that switch to a specific bank. Using this option, you must exclude port pins that you do not want to modify.

MORE INFORMATION

• Refer to Configuration in the BL51 User's Guide.

SEE ALSO

• BL51: THE CODE BANKING MECHANISM
• C51: CONFIGURING XDATA BANKING

FORUM THREADS

The following Discussion Forum threads may provide information related to this topic.

• C8051F120 code banking and data banking

Last Reviewed: Monday, July 18, 2005