Technical Support

C51: ACCESSING THE DS390 ON-CHIP 4K SRAM AND STACK

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Information in this article applies to:

• C51 Version 6.12 and later

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QUESTION

How do I configure the Keil C51 Tools for the Dallas 390 on-chip 4K SRAM and Stack?

ANSWER

You must configure the on-chip 4K SRAM and stack in both the startup code (START390.A51) and in µVision.

Configuring the 4K SRAM

In START390.A51, the internal data memory configuration bits (MCON.6 and MCON.7) are set by specifying the appropriate value for IDM as shown below.

; IDM1, IDM0:  Internal Data Memory Configuration Bits (MCON.7, MCON.6)
IDM  EQU 0  ; 0 = 4KB on-chip SRAM location X:0x00F000 - X:0x00FFFF
;           ; 1 = 4KB on-chip SRAM location X:0x000000 - X:0x000FFF
;           ; 2 = 4KB on-chip SRAM location X:0x400000 - X:0x400FFF
;           ; 3 = 4KB on-chip SRAM location X:0x400000 - X:0x400FFF
;                 and code memory C:0x400000 - C:0x400FFF

There are four options for the internal data memory:

• To configure the 390 to locate the 4K on-chip SRAM at 0x00F000-0x00FFFF, set IDM to 0. In µVision, check the Use On-Chip XRAM checkbox under Project - Options For Target - Target Tab.
• To configure the 390 to locate the 4K on-chip SRAM at 0x000000-0x000FFF, set IDM to 1. In µVision, do not check the Use On-Chip XRAM checkbox under Project - Options For Target - Target Tab. Instead, you must specify a range of memory under Off-Chip XDATA Memory. Start should be 0x000000 and Size should be 0x1000.
• To configure the 390 to locate the 4K on-chip SRAM at 0x400000-0x400FFF, set IDM to 2 or 3. In µVision, do not check the Use On-Chip XRAM checkbox under Project - Options For Target - Target Tab. Instead, you must specify a range of memory under Off-Chip XDATA Memory. Start should be 0x400000 and Size should be 0x1000. Note that this memory is only available in the contiguous mode of the 390.

Configuring the Stack

In START390.A51, the stack can be configured to use the 8051-compatible IDATA memory or the 1K on-chip XDATA memory.

; SA: Extend Stack Address Mode Enable (ACON.2)
SA   EQU 0  ; 0 = 8051 compatible stack in IDATA memory
;           ; 1 = Use 1KB stack in on-chip XDATA space

If you use the on-chip SRAM for the stack, only 1K of space is used for the stack by default. You may increase this by changing the storage specification in the startup code.

                RSEG    ?STACK
                DS      1024

Note that you must use the PK51 Professional Developer's Kit Version 6.11 or later to obtain contiguous mode support for the Dallas 390.

MORE INFORMATION

More information about the Dallas 390 Contiguous mode support may be found in the README.TXT file found in the \KEIL\C51\EXAMPLES\DALLAS 390 directory of your installation.

SEE ALSO

• C51: DEFAULT STARTUP AND INITIALIZATION CODE
• C51: CONFIGURING FOR THE DALLAS 390 CONTIGUOUS MODE
• C51: GLOBAL VARIABLE PROBLEM WITH DALLAS 390 CONTIGUOUS MODE

FORUM THREADS

The following Discussion Forum threads may provide information related to this topic.

• Debug Push-Pop Access Violation
• DS80C400 Conitguous Mode Memory Access Error

Last Reviewed: Friday, April 16, 2004

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