C51: USING PDATA MEMORY
Information in this article applies to:
I'm using a chip with on-chip XDATA memory. I want to use one
256-byte page as PDATA. How do I do that?
Does the upper address byte come from P2?
Accessing a 256-byte page (PDATA) of on-chip XDATA is possible and
often desirable since PDATA is more efficient than XDATA.
When On-chip XDATA is Enabled...
Most devices allow PDATA access (MOVX @Rx) to only the first
256 bytes of XDATA (0x0000-0x00FF). On such devices, there is
nothing to configure. You don't need to enable the PPAGEENABLE
setting in the startup code since the PPAGE is fixed by the chip to
Some devices have a special SFR that contains the upper address
byte to use for PDATA accesses. Devices like the Infineon C517A
have an SFR called XPAGE at address 0x91. In the startup code, you
must set this SFR to the page number for PDATA. We recommend you
use the first available memory page for the PDATA space (0xF8 in
the case of the Infineon device).
To configure the tools for PDATA access, you must...
Copy the startup code to your project directory, modify it for
PDATA access, and add it to the project.
In the startup code, you must set PPAGEENABLE EQU 1,
PPAGE EQU 0F8h and PPAGE_SFR DATA 091h. This
configuration reflects the Infineon C517A hardware. It will be
different depending on the chip you use.
In the BL51 Linker options, you must specify the starting
address for the PDATA memory. For the Infineon C517A device this
value is 0xF800. Enter 0xF800 under Options for Target —
BL51 Locate — Pdata:
In the Lx51 Linker options, you must specify the range of PDATA
memory. Options for Target — LX51 Locate — User
When On-chip XDATA is Disabled...
Most 8051 devices use the value of Port 2 as the upper address
byte for PDATA accesses. With such a configuration, the required
startup code settings are nearly identical to the above except that
the PPAGE SFR must be specified as PPAGE_SFR DATA 0A0H.
Refer to pdata
in the Cx51 User's Guide.
Last Reviewed: Thursday, January 04, 2007