Keil™, An ARM® Company

SmartMX DBox

SmartMX DBox

SmartMX DBox The Keil SmartMX DBox enables software debugging and integration testing for Philips SmartMX™ smart card controllers. It is based on the Philips SmartMX bondout device and integrates seamlessly with the µVision IDE to provide a high-performance development and debugging platform.

The SmartMX DBox connects directly to the µVision Debugger and provides a card reader interface with a contactless antenna and USB connection. It offers RAM and Flash ROM operation and may be used for both debugging and software verification prior to mask ROM production.

Included Components

  • The SmartMX DBox Base Unit.
  • Card Reader Adapter including ZIF socket.
  • 15-pin Card Reader Adapter cable.
  • 9V Power Supply.
  • 9-pin Serial Cable for PC COM connection.

Features/Benefits

  • Connects to the µVision Debugger which provides identical environments for Simulation and Target Debugging.
  • Supports program debugging at the Source or Assembly level with single-stepping and hardware breakpoints.
  • Allows viewing and modifying CPU registers, memory, and Special Function Registers (SFRs).
  • Includes status LED's for EBA, SSM, PD, PSAVE, CLVAL, CTVAL, and Power.
  • Offers full support of System and User Mode including MMU debugging dialog.
  • Supports two Application Download Modes: RAM for fast debug turn-around and Flash ROM software verification prior to ROM mask production.
  • Provides interfaces for contact-based card reader, contactless card reader, and USB.
  • Supports flexible CPU clock generation.

Hardware Specifications

  • 9V Power Supply.
  • 115kbps serial interface to PC host system.
  • Card reader interface (1.8V and 3.3V-5V operation).
  • Supported physical memory areas:

    • 64KB XDATA (Address Range: 00:0000-00:FFFF).
    • 256KB ROM (Address Range: 80:0000-83:FFFF).
    • 256KB Flash ROM (Address Range: A0:0000-A3:FFFF).
    • 256KB EEPROM (Address Range: C0:0000-C3:FFFF).
    • Shared memory accesses are mapped by the bondout device to physical memory spaces.
  • Hardware breakpoints may be set on execute or read and write operations to all supported memory areas.