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Hi all, I have an application with LPC2129 where a timer is running in fiq mode and the watchdog is activated. The watchdog is cyclic feeded in a swi exception that is called from the main loop. The program does not work when watchdog is enabled: Frequently, sporadic, a watchdog reset occurs. The duration of a main loop is a few milliseconds, whereas the watchdog timer value is 15 seconds, there is no problem. One reason is certainly the interruptable watchdog feed sequence with fast interrupt fiq every 1 ms. But, how to fix it? How to make the swi exception uninterruptable for fiq interrupt? How to disable the fiq without lost interrupts? I tried to set the f-bit in cpsr before swi entry and to clear the f-bit after swi but that failed. With timer in irq mode, all works fine. A solution would be to feed the watchdog uninterruptable in the fiq interrupt but that isn't a good programming practice. What can I do other than to force my knowledge and spend much time in ARM assembler and instruction set? Is there anybody who has a suggestion? Dietmar