This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Logging a fault on a Cortex machine

In the generic user guide of the Cotex M4 architecture (4.3.10 Configurable Fault Status Register) , I found this statement:
"This is an asynchronous fault. Therefore, if it is detected when the priority of the current process is higher than the BusFault priority, the BusFault becomes pending and becomes active only when the processor returns from all higher priority processes. If a precise fault occurs before the processor enters the handler for the imprecise BusFault, the handler detects both IMPRECISERR set to 1 and one of the precise fault
status bits set to 1."

So, in case of a fault, it is worth logging the values ICSR (Interrupt Control and State Register) and Interrupt set pending register (4.2.4) ?
I think this is pointless because it will not always yield the right answer (i.e. the exception that was running at the time of the fault) due to the asynchronous nature of bus faults and their priorities.
Can you help me shed light on this?