Hey People I'm trying to simulate the simple Blinky example from the example folders of my evaluation board. I'm using a MCB2929 board which has a LPC2929. When Target Debugging mode is used with the ULINK2 there are no problems and everything runs smoothly. Now, I want to simulate the code and use the performance analysis tools. When I ran the simulation, at first, error 65 was prompted. The "map" command and the micro-controller datasheet were used to solve this problem, which brings us to the first question: Isn't the memory map defined for the simulator by default?? The second problem is that, when simulation starts, the exception vector is not loaded at address 0x00000000. All I have is ANDEQ R0, R0, R0 from address 0x00000000 till 0x20000000 which happens to be the start of the flash memory. I manually set the PC to the start of the flash and pushed the run button. It got stuck in the PLL_LOCK loop; the pll does not lock. I tried to skip it, but the problem still persists during the setting of the FIDV's. I checked the CLOCK and XTAL VTREG's using DIR VTREG,they are both set to 12 MHz as said in the board user guide. What am I missing here?? I'm using Keil's uVision4. Any help would be appreciated.
Error 65 is indicative that the simulator does not support the chip completely, a great deal of chips only have partial coverage of the CPU+Peripherals
Hey Westonsupermare Pier! Thanks for the speedy reply. You mentioned "Partial Coverage", how can I confirm this? If so, are you aware of any tools or workarounds for performance analysis? Also can you give me a lead regarding the missing exception vectors during reset when simulating? Is this a software bug, uVision bug, or am I missing a certain type of script? I tried the same scenario with the MCB1700 evaluatino board which has a LPC1768 Coretex-M3 microcontroller. The simulation ran without any errors and the map command wasn't required. Again, thanks for the help.
Simulation support, and the limits thereto are usually on the Keil CPU pages http://www.keil.com/dd/chip/4804.htm
The mapping of ROM/FLASH, or other memories, at zero is usually implementation specific.
Suggest you contact Keil support related to your requirements/expectations.
I feel that for newer processors, the Keil description of the individual processors no longer give any valid information about the state of simulation. Maybe Keil has taken some policy decision to not indicate anymore when a processor has only partial support.
But why update to newer versions of the tools if we don't know that we get simulation for newer processors? We can often get by with an older version of the compiler if we can't simulate.
Hello people I installed mdk511 which has Uvision5. I was hoping to run a successful simulation with LPC2929. IT BRICKED MY ULINK2!!!. I was prompted with JTAG COMMUNICATION FAILURE. I checked my device manager; it recognized ULINK2. I erased the entire firmware using the ULINK2 ERASE FW suggested at the following article: http://www.keil.com/support/docs/3632.htm. I ran my old uVision, went into settings and saw the that uVision was programming ULINK2. When it was complete, it showed firmware updated. Now when I go into options/Debug/settings/, in the jtag device chain I see the JTAG COMMUNICATION FAILURE message!! no IDCODE is present and I can't program or erase my MC. The firmware is version 1.42. I get a very bad vibe from not being able to see the Ulink IDCODE. Any suggestions? Are these kind of errors common during updates? Words like backward and compatibility come to mind.... thanks people.