hi, All I encountered a strange problem. When I integrated my mudole into the project, which is finished by my colleague and me, the total project can not work normmaly and can not dislpay anything . The following is the description for my project: The target is intel 8032 with extended memory Xdata (1024 byte), DRAM (2M byte) and 2M flash memory. The target MCU has been integrated into system on chip to control TV chip. This project is divided into several part: UI, service and driver. Up to now, these components can run normally separately. When my module, one of service,and UI module combined to a test unit, I found the code can not work. Our project used 8 bank(0--7) to save code into flash. UI and drivers took up 6 code banking, what's more ,they and work well. But When I added my obj file into bank6 , the code can not run in the target platform. I tested my module dividually and found it could work in the real platform without UI module. With the limit of harware, I can not use uVision 2 tool to debug the module. I cheked the Map file *.M51 and can't find out the false in it. Any error for banking configuration for code banking ? What's wrong with it. Any reason can cause the result? I paste my banking file as follows: common {..\obj\Driver\misc\l51bank8.obj, ..\obj\Driver\misc\startup.obj, ..\obj\Driver\misc\isr.obj, ..\obj\Driver\misc\timer_ui.obj }, bank0 { ..\obj\Driver\rs232\drv_rs232.obj, ..\obj\Emulate\test_osd.obj, ..\obj\Driver\kernel\setDRAM.obj, ..\obj\Driver\misc\init.obj, ..\obj\Driver\misc\util.obj, ..\obj\Driver\vdoin\hw_vdoin.obj, ..\obj\Driver\tve\drv_tve.obj, }, bank6 { ..\obj\Service\CC\ccdata.obj, ..\obj\Service\CC\CCApi.obj } to UI.OMF DS DL RS(256) XDATA(0FC00h-0FFFFh) & DISABLEWARNING (13) & RC(0) & common(?PR?_VRS232LOGB?DRV_RS232, ?PR?_VRS232LOGS?DRV_RS232) & bank0(?CO?DRV_TVE, ?CO?DRV_IR) & bank1(?CO?VGA_TABLE, ?CO?TTXOSD, ?CO?DRV_OSD) & bank6(?CO?CCDATA, ?CO?CCAPI) Thanks any advice and help in advance. Jansen
"The target is intel 8032 with extended memory Xdata (1024 byte), DRAM (2M byte) and 2M flash memory." Wow! With a project on that scale, surely you can afford an ICE? "With the limit of harware, I can not use uVision 2 tool to debug the module." Why not? What's the specific limit that prevents you? What was your strategy for debugging when you started this?
When you program the EPROM, make sure that all banks have code in them. Look at the chip selects for A16, A17, .... For example, suppose you had a 256K byte chip but used only two banks: 0-64K and 64K-128K. Wouldn't you need to put code into 128-192 and 192-256 if the chips depended on A16 and A17?
All, Thanks a lot for your advice! I have resolved the problem. It is caused by my tool. When the bin file was generated by keil liker for each bank, each file must be merged into one file to use. The tool to merge file has something problem. I changed the banking configuration, then it is OK! Jansen