In LPC21xx ARM7 MCUs, when the MEMMAP[1:0]register=00 ,ie in bootloader mode,the interrupts are mapped from on chip flash to a new location at 0x7FFF E008.But this address is somewhere near 2GB in addres space and the MCU has 16kb ram and 256 kb flash, all of which end at 0x4000 3FFF. Then where is this 'mapped copy' actually copied? Surely, there is no physical storage element present at 0x7FFF E008.
Thanks in advance.
Maybe it is because what you normally want is to set MEMMAP to 2, so that the application can grab its vectors from RAM (they have to be copied there, of course!).
There are three different settings for the interrupt vector mapping.
The first setting is for a built-in flash with the NXP boot loader. This boot loader is always run when the chip boots. If it finds that you have programmed the chip, it will recondigure the vector table into the start of the normal flash and jump there.
This is the place where you may place the startup code for your application, or a second-level boot loader that performs CAN, USB, ... transfers before switching the interrupt vector table into RAM and starts your downloaded application.
Thanks guys, But i'm still confused.So is the 'boot block' a physical memory inside the chip that is not user accessible, but is used to perform the action that you just described above ? And is it physically located at 0x7FFF E008?
An excerpt from the user manual:
MAP1:0 00: Boot Loader Mode. Interrupt vectors are re-mapped to Boot Block 01: User Flash Mode. Interrupt vectors are not re-mapped and reside in Flash. 10: User RAM Mode. Interrupt vectors are re-mapped to Static RAM. .... .... .... .... For example, whenever a Software Interrupt request is generated, ARM core will always fetch 32-bit data "residing" on 0x0000 0008 (see Table 3, “ARM Exception Vector Locations,†on page 52). This means that when MEMMAP[1:0]=10 (User RAM Mode), read/fetch from 0x0000 0008 will provide data stored in 0x4000 0008. If MEMMAP[1:0]=01 (User Flash Mode), read/fetch from 0x0000 0008 will provide data stored in on-chip Flash location 0x0000 0008. In case of MEMMAP[1:0]=00 (Boot Loader Mode), read/fetch from 0x0000 0008 will provide data availble also at 0x7FFF E008 (Boot Block remapped from on-chip Flash memory).
Exactly where the boot block is physically located, I can't say. But the chip has extra code space besides the flash area that is available to you.
This is what allows the chip to be ISP, i.e. you can connect a serial cable to UART0 and download software even if the flash is unprogrammed. And if you look at the user manual, you will notice that when you do IAP, you will call a helper function for the programming - this helper function is stored in the same memory where the initial boot loader is stored.
But only NXP can tell if the chip does any magical memory remappings before your application is started.
But anyway - that is the reason why the interrupt vector table can be mapped to three different locations, instead of just two.
(I don't know much about this, but I would like to answer this question from my understanding, and hope that my answer can be verified and corrected.)
en.wikipedia.org/.../Address_space [start] In computing, an address space defines a range of discrete addresses, each of which may correspond to a physical or virtual memory register, a network host, peripheral device, disk sector or other logical or physical entity.
In general, things in one address space are physically in a different location than things in another address space. However, sometimes different address spaces overlap (some physical location exists in both address spaces). [end]
There are 4G address/memory space there, but the physically memory is much less than 4G. So some of them must be virtual. For myself, I prefer to treat them as, all of the 4G address/memory space are virtual. As I am a software guy, don't know anything about hardware, physically memory address is not important to me.
The memory remapping is just like some kind of creating a "shortcut" or creating a "symbolic link", The data copy is unnecessary.
[start] UM10114 LPC21xx and LPC22xx User manual Rev. 03 â€" 2 April 2008 User manual
Chapter 2: LPC21xx/22xx Memory map
3.1 Memory map concepts and operating modes
The basic concept on the LPC21xx and LPC22xx is that each memory area has a "natural" location in the memory map. This is the address range for which code residing in that area is written. The bulk of each memory space remains permanently fixed in the same location, eliminating the need to have portions of the code designed to run in different address ranges. [end]
ARM7 processor always gets its ARM exception vectors from the virtual memory addresses 0x0000 0000 through 0x0000 001C, no matter where the virtual memory addresses point to. So, if you need different ARM exception vectors, then remap your virtual memory addresses. (And I remember that some expert emphasizes that, An ARM exception vector is an instruction for execution, not an address for goto.)