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EEPROM EMULATION on STR71x family CPU

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Author
JIMMY SAYAVONG
Posted
10-Jun-2006 15:02 GMT
Toolset
ARM
New! EEPROM EMULATION on STR71x family CPU
I am having a problem trying to use internal flash (bank1)as EEPROM of STR71x family microprocessor. Using a HITEX eval board (purchased from Keil) and I copied code directly from the sample files came with the compiler --- the result was, system
hung immediately when I ran it. Could the ARM expert(s) this forum kindly take a look
at the code below and then please tell
me what I did wrong here?

Thanks in advance,

JIMMY

int main(void)
{
 u32 Read_Data;

     /*  Initialize the FLASH */
  FLASH_Init () ;
     /*  Disable temporarily the FLASH   protection on Bank 1 sector 0 */
  FLASH_WritePrConfig (FLASH_B1F0,DISABLE) ;  //<<< SYSTEM HANG !! begins here

  /*  Erase Bank 1 sector 0 */
  FLASH_SectorErase (FLASH_B1F0) ;

  /*  Write  0x12345678 to Bank 1 sector 0 */
  FLASH_WordWrite (0x000C0000,0x12345678) ;

  /* Read back the written data at address 0x400C0000*/
   Read_Data = FLASH_WordRead(0x000C0000);

  /* Display the read data on the debugger output window. You can use also
     the debugger memory window to verify the good content of the flash at
     0x400C0000 address and see the value "0x12345678"*/
   printf(" The data written at address 0x400C0000 is %x\n",Read_Data);
   printf("\n");

  /* Warning!! : The write protection can be enabled ONLY on a permanent way */

  /*  Enable the FLASH protection on Bank 1 sector 0 */
  /*  FLASH_WritePrConfig (FLASH_B1F0,ENABLE) ; */

  while(1);

}
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Author
Robert McNamara
Posted
21-Jun-2006 20:46 GMT
Toolset
ARM
New! RE: EEPROM EMULATION on STR71x family CPU
The problem comes from the line of code in the STR7x library that looks like this

FLASHR->CR0 |= FLASH_WMS_MASK

Until this operation completes, you cannot read from flash. You are most likely running you code from flash.

To fix (more than 1 way) -

You can make sure that any instruction that sets FLASH_WMS_Mask in FLASHR->CR0 runs out of RAM.

You are supposed to be able Modify Bank1 while running from Bank0, but I have heard from somewhere, that the first access to FLASHR->CR0 = FLASH_WMS_Mask will cause of of FLASH to become unreadble until it completes. I have found if best to just that small amount of code that sets CR0 and test for completion from RAM. Nothing else needs to run from ram (make sure interrupts are disabled when you hit this register, because they will try to read from flash)
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Author
divyakumar Kesharwani
Posted
22-Jun-2006 09:27 GMT
Toolset
ARM
New! problem in single step debugging
i wrote the following codes on keil simulation software for LPC2102.
i added the startup file and my source file on debugging gave no error but the registers containts were not as accepted.
the source code was:
AREA programe,CODE,READONLY
EXPORT main
IMPORT |Lib$Request$armlib|,WEAK
IMPORT _main
main
LDR R1,Value
MVN R1,R1
STR R1,Result
SWI 0x11
Value DCD 0xC123
Result DCD 0
END
and when i debugged using single step , the process is getting stuck up at some point in stareup's disassambled codes...somewhere
0x00000178 to 0x00000184 address. The arrow mark do not proceed further.
please help me out of this problem.
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Author
Rene Don
Posted
23-Jun-2006 12:35 GMT
Toolset
ARM
New! RE: EEPROM EMULATION on STR71x family CPU
Robert is right on the spot here.

See also this thread:
http://mcu.st.com/mcu/modules.php?mop=modload&name=Splatt_Forums&file=viewtopic&topic=2611&forum=17

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