I access the memory of w77e58 on-chip sram,
whether it must be through Port P0 and P2 ,or
not?
Read-Only
Author Oleg Sergeev
Posted 5-Aug-2003 17:35 GMT
Toolset C51
RE: c51
Oleg Sergeev
Could you set and read docs little more?
Winbond has provided very informative data sheets. Read about DME0 bit of PMR (page 23) and Memory Organization (page 8).
HINT: accessing internal memory has nothing with P0 and P2.
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