Please help me...
i am trying to write driver for CAN interface of LPC2129
Everything but the receive message ISR is working fine..
I am unable to hit ISR.
Please let me know where i am going wrong in the following
code...
U16 CAN_Init (U16 can_port,U16 can_isrvect,U32 can_btr)
{
U32 *pSFR; // pointer into SFR space
U32 *pSFR2; // pointer into SFR space
U32 offset; // offset added to pSFR
//Check can_isrvect value
if (can_isrvect > 15)
{
return 0; // Illegal value for can_isrvect
}
//Check can_port value
if(can_port < 1 || can_port > MAX_CANPORTS)
{
return 0; //Illegal value for can_port
}
//Enable pins for Selected can interface
switch(can_port)
{
case 1:
PINSEL1 |= 0x00040000; // Set bit 18
offset = 0x00000000;
break;
case 2:
PINSEL1 |= 0x00014000; // Set bits 14 to Enable RD2 and 16 to Enable TD2
offset = 0x00001000;
break;
default:
return 0; // Illegal value returned
}
// Reset and disable all message filters
CANFilter = 0;
// Acceptance Filter mode register - Off
AFMR = 0x00000001;
pSFR = (U32 *) &C1MOD + offset; // Select canmod Register
*pSFR = 0x00000001; // Go To Reset Mode
pSFR = (U32 *) &C1IER + offset; // Select Interrupt Enable Register
*pSFR = 0; // Disable All Interrupts
pSFR = (U32 *) &C1GSR + offset; // Select Status Register
*pSFR = 0; // Clear Status register
pSFR = (U32 *) &C1BTR + offset; // Select BTR Register
*pSFR = can_btr; // Set bit timing
pSFR = (U32 *) &C1MOD + offset;
*pSFR = 0x00;
pSFR2 = (U32 *) &VICVectCntl0;
pSFR2 += can_isrvect; // Set to desired interrupt control
// Set and enable receive interrupt
pSFR = (U32 *) &VICVectAddr0;
pSFR += can_isrvect; // Set to desired interrupt vector
switch(can_port)
{
case 1:
//Set interrupt vector
*pSFR = (U32) CANISR_RX1;
//Use this interrupt for CAN RX1
*pSFR2 = 0x20 | 26;
//Enable CAN RX1 interrupt
VICIntEnable |= 0x04000000;
break;
case 2:
//Set interrupt vector
*pSFR = (U32) CANISR_RX2;
//Use this interrupt for CAN RX2
*pSFR2 = 0x20 | 27;
//Enable CAN RX2 interrupt
VICIntEnable |= 0x08000000;
break;
default:
return 0; // Invalid value used
}
pSFR = (U32 *) &C1IER + offset; // Select Interrupt Register
*pSFR = 1; // Enable Interrupt Register
pSFR = (U32 *) &C1MOD + offset; // Select mode register
*pSFR = 0;
pSFR = (U32 *) &C1CMR + offset;
*pSFR = 0; // Operating mode
pSFR = (U32 *) &C1MOD + offset;
*pSFR = 0x00;
// Successful Return
return 1;
}
This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies.
ARM websites use two types of cookie: (1) those that enable the site to function and perform as required; and (2) analytical cookies which anonymously track visitors only while using the site. If you are not happy with this use of these cookies please review our Privacy Policy to learn how they can be disabled. By disabling cookies some features of the site will not work.