Hello, I am Davide Masi and I work on Fujitsu based on ARM Cortex M3.
How do I relocate the interrupt vector table from address 0x0000 to a different address, for examples in RAM? Where can I find examples or AN about the problem?
Thanks
See Cortex-M3 Technical Reference Manual. Look for Vector Table Offset Register.
Is possible to relocate the vector table also in run-time?
Well of course - how else can a bootloader do its job?
I am struggling to see how a reference to a bootloader is relevant. For example, on a STR710 MCU (ARM7TDMI) the vector table is fixed at address 0. Either the on-chip flash or the on-chip RAM can be mapped (and re-mapped at run time) at address 0. I believe the same feature is present in the STM32 family, for example. Having the vector table in RAM gives the necessary flexibility to implement a bootloader. Having said that, the vector table in the Cortex-M3 is relocatable at run time
#define NVIC_VectTab_FLASH (0x00000000) #define AP_START_SECTOR 0x00010000 void NVIC_SetVectorTable(unsigned long NVIC_VectTab, unsigned long Offset) { SCB->VTOR = NVIC_VectTab | (Offset & (unsigned int)0x1FFFFF80); } int main (void) { void (*user_code_entry)(void); // your code here . . . // the jump to new vector table. NVIC_SetVectorTable(NVIC_VectTab_FLASH, AP_START_SECTOR); user_code_entry = (void (*)(void))((AP_START_SECTOR)+1); // jumps to new position of vector class user_code_entry(); }
So have you explored the Fujitsu website for support in this matter?
Sorry but I can not to reallocate the vector table What steps should I follow to reallocate the table of vectors?
just adapt code already pasted
Sorry but I can not to reallocate the vector table
What do you mean? Did you try? What exactly happened?
What steps should I follow to reallocate the table of vectors?
Step one:
*(int volatile*)0xE000ED08 = 0x12340000; /* where 0x12340000 is the new location of the vector table */
That's it. There is no step two.
Cortex-M unlike ARM7 has a register called VTOR; the Vector Table Offset Register.
When the interrupt controller on a Cortex-M device is 'triggered' it will start at this location for interrupt handler addresses.
This is not possible on ARM7 although some hardware manufacturers have provided additional features to give some of this functionality on ARM7 devices.
Often, on Cortex-M devices the bootloader is designed and compiled/linked to run from 0x0 and when it jumps to the main application (compiled andlinked to run at another location) it first sets the VTOR before jumping to the main application.