We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.
Hello,
This is not a Keil specific question, but I was hoping that somebody would be able to clarify the following as I don't have a lot of experience with Cortex M0 chips (I have a LPC1114 at my disposal):
I understand that unlike Cortex M3s, a Cortex M0 always runs in privileged mode. Therefore,
__disable_irq() ;
always disables the interrupts.
What is then the purpose of the SVC instruction on a Cortex M0? It is supposed to switch the core to a privileged mode just like a ARM7's SWI instruction, but apparently it is not necessary...? If so, I also don't need to do anything special when jumping from a bootloader to the application (in terms of processor mode), right?