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NXP LPC812M101JDH16

ARM Cortex-M0+, 30 MHz, 16 kB ROM, 4 kB RAM

The LPC81x are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating at CPU frequencies of up to 30 MHz. The LPC81x support up to 16 kB of flash memory and 4 kB of SRAM. The peripheral complement of the LPC81x includes a CRC engine, one I2C-bus interface, up to three USARTs, up to two SPI interfaces, one multi-rate timer, self wake-up timer, and state-configurable timer, one comparator, function-configurable I/O ports through a switch matrix, an input pattern match engine, and up to 18 general-purpose I/O pins.

Core ARM Cortex-M0+, 30 MHz
  • Processor:ARM Cortex-M0+, 30 MHz
  • Other:1 x CRC engine
Memory 4 kB RAM, 16 kB ROM
  • ROM:16 kB
  • RAM:4 kB
Communication SPI, I2C, USART
  • SPI:2 x SPI
  • I2C:1 x I2C
  • USART:3 x USART
Timer/Counter/PWM 4 x 0-bit Timer
  • Watchdog:1 x Windowed Watchdog timer
  • Timer/Counter:4 x 0-bit 32-Bit Timer with Input Capture, Output Compare and PWM
Analog 1 x Comparator
  • Other:1 x Comparator
I/O & Package 16-SOP
  • I/Os:14 Inputs/Outputs
  • Package, SOP:16-lead SSOP Package
Development Tools
CMSIS Drivers No CMSIS-Driver in Device Family Pack.
Examples
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