NXP LPC54618J512

The LPC5460x are ARM Cortex-M4 based microcontrollers for embedded applications. These devices include an ARM Cortex-M4 coprocessor, up to 200 KB of on-chip SRAM, up to 512 KB on-chip flash, full-speed and high speed USB device interface with Crystal-less operation, a DMIC subsystem with PDM microphone interface and I²S, five general-purpose timers, one SCTimer/PWM, one RTC/alarm timer, one 24-bit Multi-Rate Timer (MRT), a Windowed Watchdog Timer (WWDT), eight flexible serial communication peripherals (each of which can be a USART, SPI, or I²C interface), and one 12-bit 5.0 Msamples/sec ADC, and a temperature sensor. The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals, and includes an internal prefetch unit that supports speculative branching. The ARM Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A hardware floating-point unit is integrated in the core.