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ARM SSE-200-MPS3

ARM Cortex-M33, 50 MHz, 8 MB ROM, 4 MB RAM

SSE-200 for MPS3 (TrustZone enabled subsystem). This version only supports one Cortex-M33, core 0, from the 2 cores in the system. The flag __DOMAIN_NS is used in the internal files to distinguish between secure and non-secure application. Please, use the flag as follow: -> secure application uses -D__DOMAIN_NS=0 -> non-secure application uses -D__DOMAIN_NS=1

Core ARM Cortex-M33, 50 MHz
  • Processor:Cortex-M33, 50 MHz
Memory 4 MB RAM, 8 MB ROM
  • ROM:4 MB
  • ROM:4 MB
  • RAM:2 MB
  • RAM:2 MB
Communication SPI, I2C, USART
  • SPI:3 x SPI
  • I2C:4 x I2C
  • USART:6 x USART
Development Tools
CMSIS Drivers
  • SPI driver used by RTE Drivers for SSE-200
  • I2C driver used by RTE Drivers for SSE-200
  • USART driver used by RTE Drivers for SSE-200
  • MPC (Memory Protection Controller) driver used by RTE Drivers for SSE-200
  • PPC (Peripheral Protection Controller) driver used by RTE Drivers for SSE-200
Examples
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