For Cypress CY8C3665PVI-007 — Clock Generation
Simulation support for this peripheral or feature is comprised of:
- VTREGs (Virtual Target Registers) which support I/O with the peripheral.
These simulation capabilities are described below.
Data Type: unsigned char
The PORTx VTREGs represent the I/O pins of the simulated
MCU for Port 0, Port 1, and so on. PORT0 represents Port 0, PORT1
represents Port 1, etc. You may read PORTx to determine the
state of the output pins of that port. For example, in the command
window, you may type,
to obtain value corresponding to the set pins of Port 0. You may
also change the input values of port pins by changing the value of
the VTREG. For example,
sets the upper four port pins of Port 1 to a value of 1 and the
lower 4 port pins to a value of 0. You may use the bitwise operators
AND(&), OR(|) and XOR(^) to change individual bits of the PORTx
VTREGs. For example:
PORT1 |= 0x01; /* Set P1.0 Pin */
PORT3 &= ~0x02; /* Clr P3.1 Pin */
PORT1 ^= 0x80; /* Toggle P1.7 Pin */
Data Type: unsigned long
The XTAL VTREG contains the frequency of the oscillator (in Hertz)
used to drive the microcontroller. The value is automatically set
from the value specified in Project Options - Options for Target.
However, you may change the value of XTAL using the command window.
You may also output the current value of XTAL using the
XTAL may be used in calculations to synchronize external scripts
with the simulated microcontroller.