Peripheral Simulation

For Silicon Laboratories, Inc. C8051T610 — SMBus0 / I²C Interface

Simulation support for this peripheral or feature is comprised of:

• VTREGs (Virtual Target Registers) which support I/O with the peripheral.

These simulation capabilities are described below.

SMB0_CLK VTREG
Data Type: unsigned long

The SMB0_CLK VTREG specifies the clock frequency (in Hz) to use in SLAVE mode. 100000 specifies 100KHz.

SMB0_IN VTREG
Data Type: unsigned int

The SMB0_IN VTREG contains data sent from an SMBus0 or I²C peripheral to the simulated MCU.

• 0x0000-0x00FF: An address or data byte transfer.
• 0x0100: START byte. This initiates a SLAVE transmit or receive. The next byte sent is the address.
• 0xFF00: ACK.
• 0xFF01: NACK.
• 0xFFFF: IDLE or STOP condition.

SMB0_OUT VTREG
Data Type: unsigned int

The SMB0_OUT VTREG contains data sent from the simulated MCU to an SMBus0 or I²C peripheral.

• 0x0000-0x00FF: An address or data byte transfer.
• 0x0100: START byte. This initiates a MASTER transmit or receive. The next byte sent is the address.
• 0xFF00: ACK.
• 0xFF01: NACK.
• 0xFFFF: IDLE or STOP condition.