 | Device Database® |  |
|
|
Product Information Device Database® Downloads Compliance Testing Distributors | Peripheral SimulationFor Silicon Laboratories, Inc. C8051F065 — External and On-Chip Memory Simulation support for this peripheral or feature is comprised of: - Dialog boxes which display and allow you to change peripheral configuration.
These simulation capabilities are described below. External and On-Chip Memory Dialog
The External and On-Chip Memory dialog displays and configures simulation capabilities of the external and on-chip Flash memory. Flash Memory - EMI0CN (External Memory Interface Control) contains the external memory page select bits. These bits provide the high byte of the 16-bit external data memory address when using an 8-bit MOVX command, effectively selecting a 256-byte page of RAM.
- EMI0CF (External Memory Configuration) contains the following configuration settings:
- EMD2 (EMIF Multiplex Mode Select) is set to operate in non-multiplexed (separate address and data) mode.
- EMD (EMIF Operating Mode Select) selects the operating mode of the Extended Memory Interface.
- EALE (ALE Pulse-Width Select Bits) selects the Address Latch Enable pulse width in system clock cycles.
- EMI0TC (External Memory Timing Control) contains the following memory timing controls:
- EAS (EMIF Address Setup Time Bits) sets the number of system clock cycles for address setup.
- EWR (EMIF /WR and /RD Pulse-Width Control Bits) sets the number of system clock cycles for pulse width.
- EAH (EMIF Address Hold Time Bits) sets the number of system clock hold cycles.
|
|