Peripheral Simulation

For Silicon Laboratories, Inc. C8051F125 — PCA Timer with Modules

Simulation support for this peripheral or feature is comprised of:

• Dialog boxes which display and allow you to change peripheral configuration.

These simulation capabilities are described below.

PCA Timer Dialog

The PCA Timer Dialog controls simulation all of the 16-bit PCA counter/timer.

PCA Timer

• Input Mode is the mode for the selected capture/compare register.
• WDT Offset (Watchdog Timer Offset) is the time, in milliseconds, before the WDT will expire.
• PCA0 (PCA Counter Timer Register) holds the counter or timer value used by the PCA.
• PCA0CN (PCA Control Register) contains the PCA Timer run control and overflow flag.
• CR (PCA Counter/Timer Run Control) is set to enable the PCA counter/timer.
• CF (PCA Counter/Timer Overflow Flag) is set to cause a PCA interrupt when an overflow occurs.
• ECI (External Clock Input) is set to use the external clock as the PCA clock source.
• PCA0MD (PCA Mode Register) contains the following control bits:
• CIDL (PCA Counter/Timer Idle Control) is set to suspend PCA operation when the system controller is in idle mode.
• ECF (PCA Counter/Timer Overflow Interrupt Enable) is set to enable a PCA interrupt when CF is set.