#ifndef __HT80C51_H__
#define __HT80C51_H__

// ------------------------------------------------------------------------------
// File: ht80c51.h
// Header file for Handshake Solutions HT80C51 microcontroller core.
// 
// (c) 2005 by Koninklijke Philips Electronics N.V.. Handshake Solutions.
// All rights reserved.
// ------------------------------------------------------------------------------



sfr  SP              = 0x81;
sfr  DPL             = 0x82;
sfr  DPH             = 0x83;
sfr  PCON            = 0x87;
sfr  TCON            = 0x88;
// SFR bits of TCON
sbit IT0             = 0x88;
sbit IE0             = 0x89;
sbit IT1             = 0x8A;
sbit IE1             = 0x8B;
sbit TR0             = 0x8C;
sbit TF0             = 0x8D;
sbit TR1             = 0x8E;
sbit TF1             = 0x8F;

sfr  TMOD            = 0x89;
sfr  TL0             = 0x8A;
sfr  TL1             = 0x8B;
sfr  TH0             = 0x8C;
sfr  TH1             = 0x8D;
sfr  POUT0           = 0x90;
sfr  POUT1           = 0x91;
sfr  PIN0            = 0x92;
sfr  PIN1            = 0x93;
sfr  SCON            = 0x98;
// SFR bits of SCON
sbit RI              = 0x98;
sbit TI              = 0x99;
sbit RB8             = 0x9A;
sbit TB8             = 0x9B;
sbit REN             = 0x9C;
sbit SM2             = 0x9D;
sbit SM1             = 0x9E;
sbit SM0             = 0x9F;

sfr  SBUF            = 0x99;
sfr  IEN0            = 0xA8;
// SFR bits of IEN0
sbit EX0             = 0xA8;
sbit ET0             = 0xA9;
sbit EX1             = 0xAA;
sbit ET1             = 0xAB;
sbit ES0             = 0xAC;
sbit ES1             = 0xAD;
sbit EA              = 0xAF;

sfr  IP0             = 0xB8;
// SFR bits of IP0
sbit PX0             = 0xB8;
sbit PT0             = 0xB9;
sbit PX1             = 0xBA;
sbit PT1             = 0xBB;
sbit PS0             = 0xBC;
sbit PS1             = 0xBD;

sfr  DCON            = 0xC0;
sfr  DKEY            = 0xC1;
sfr  DTXT            = 0xC2;
sfr  XRAMP           = 0xC9;
sfr  PSW             = 0xD0;
// SFR bits of PSW
sbit P               = 0xD0;
sbit OV              = 0xD2;
sbit RS0             = 0xD3;
sbit RS1             = 0xD4;
sbit F0              = 0xD5;
sbit AC              = 0xD6;
sbit CY              = 0xD7;

sfr  ACC             = 0xE0;
sfr  IEN1            = 0xE8;
sfr  B               = 0xF0;
sfr  SPCR            = 0xF5;
sfr  SPSR            = 0xF6;
sfr  SPDR            = 0xF7;
sfr  IP1             = 0xF8;

#endif