Application Note 209

Using Cortex-M3 and Cortex-M4 Fault Exceptions

Cortex-M processors implement an efficient exception model that also traps illegal memory accesses and several incorrect program conditions. This application note describes the Cortex-M fault exceptions from a programmers point of view and explains the fault exceptions usage.

Revision

• June 2014 - Register misspellings corrected
• Initial version