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Application Note 209

Using Cortex-M3 and Cortex-M4 Fault Exceptions

Cortex-M processors implement an efficient exception model that also traps illegal memory accesses and several incorrect program conditions. This application note describes the Cortex-M fault exceptions from a programmers point of view and explains the fault exceptions usage.


  • June 2014 - Register misspellings corrected
  • Initial version
APNT209.PDF (728K)
Thursday, June 12, 2014

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